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256 Gb 3 b/Cell V-nand Flash Memory With 48 Stacked WL Layers

IEEE journal of solid-state circuits, 2017-01, Vol.52 (1), p.210-217

2017

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A 128 Gb 3b/cell V-NAND Flash Memory With 1 Gb/s I/O Rate

IEEE journal of solid-state circuits, 2016-01, Vol.51 (1), p.204-212

2016

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Three-Dimensional 128 Gb MLC Vertical nand Flash Memory With 24-WL Stacked Layers and 50 MB/s High-Speed Programming

IEEE journal of solid-state circuits, 2015-01, Vol.50 (1), p.204-213

2015

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A 1Tb 4b/cell 64-stacked-WL 3D NAND flash memory with 12MB/s program throughput

2018 IEEE International Solid - State Circuits Conference - (ISSCC), 2018, p.340-342

2018

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A 90-nm CMOS 1.8-V 2-Gb NAND flash memory for mass storage applications

IEEE journal of solid-state circuits, 2003-11, Vol.38 (11), p.1934-1942

2003

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A world's first product of three-dimensional vertical NAND Flash memory and beyond

2014 14th Annual Non-Volatile Memory Technology Symposium (NVMTS), 2014, p.1-5

2014

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High-performance 1-Gb-NAND flash memory with 0.12-μm technology

IEEE journal of solid-state circuits, 2002-11, Vol.37 (11), p.1502-1509

2002

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A new gradual hole injection dual-gate LIGBT

IEEE electron device letters, 1998-12, Vol.19 (12), p.490-492

1998

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CB-BRT: a new base resistance-controlled thyristor employing a self-aligned corrugated p-base

IEEE electron device letters, 1998-12, Vol.19 (12), p.493-495

1998

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7.6 1GB/s 2Tb NAND flash multi-chip package with frequency-boosting interface chip

2015 IEEE International Solid State Circuits Conference (ISSCC), 2015, p.1-3

2015

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7.2 A 128Gb 3b/cell V-NAND flash memory with 1Gb/s I/O rate

2015 IEEE International Solid State Circuits Conference (ISSCC), 2015, p.1-3

2015

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A 512-Gb 3-b/Cell 64-Stacked WL 3-D-NAND Flash Memory

IEEE journal of solid-state circuits, 2018-01, Vol.53 (1), p.124-133

2018

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A 1.8-Gb/s/Pin 16-Tb NAND Flash Memory Multi-Chip Package With F-Chip for High-Performance and High-Capacity Storage

IEEE journal of solid-state circuits, 2021-04, Vol.56 (4), p.1129-1140

2021

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A 1.2V 1.33Gb/s/pin 8Tb NAND flash memory multi-chip package employing F-chip for low power and high performance storage applications

2017 Symposium on VLSI Circuits, 2017, p.C194-C195

2017

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A 1.8 V 1 Gb NAND flash memory with 0.12 mu m STI process technology

Digest of technical papers - IEEE International Solid-State Circuits Conference, 2002-01, p.80-81+410

2002

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A Comparison between 63nm 8Gb and 90nm 4Gb Multi-Level Cell NAND Flash Memory for Mass Storage Application

2005 IEEE Asian Solid-State Circuits Conference, 2005, p.13-16

2005

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The maximum controllable current of emitter switched thyristors employing the segmented p-base

Physica scripta, 1999-01, Vol.1999 (1), p.294

1999

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A lateral trench-MOS bipolar-mode FET on silicon-on-insulator

Physica scripta, 1999-01, Vol.1999 (1), p.307

1999

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Disturbance-suppressed ReRAM write algorithm for high-capacity and high-performance memory

2014 14th Annual Non-Volatile Memory Technology Symposium (NVMTS), 2014, p.1-4

2014

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30.3 A 512Gb 3b/Cell 7th -Generation 3D-NAND Flash Memory with 184MB/s Write Throughput and 2.0Gb/s Interface

2021 IEEE International Solid- State Circuits Conference (ISSCC), 2021, Vol.64, p.426-428

2021

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13.1 A 1Tb 4b/cell NAND Flash Memory with tPROG=2ms, tR=110µs and 1.2Gb/s High-Speed IO Rate

2020 IEEE International Solid- State Circuits Conference - (ISSCC), 2020, p.218-220

2020

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13.4 A 512Gb 3-bit/Cell 3D 6th-Generation V-NAND Flash Memory with 82MB/s Write Throughput and 1.2Gb/s Interface

2019 IEEE International Solid- State Circuits Conference - (ISSCC), 2019, p.216-218

2019

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A fast-switching SOI SA-LIGBT without NDR region

12th International Symposium on Power Semiconductor Devices & ICs. Proceedings (Cat. No.00CH37094), 2000, p.149-152

2000

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11.4 A 512Gb 3b/cell 64-stacked WL 3D V-NAND flash memory

2017 IEEE International Solid-State Circuits Conference (ISSCC), 2017, p.202-203

2017

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Cell Operation Technologies to Overcome Scale-down Issues in 3D NAND Flash Memory

2022 International Conference on Electronics, Information, and Communication (ICEIC), 2022, p.298-299

2022

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256 Gb 3 b/Cell V-nand Flash Memory With 48 Stacked WL Layers

A 128 Gb 3b/cell V-NAND Flash Memory With 1 Gb/s I/O Rate

Three-Dimensional 128 Gb MLC Vertical nand Flash Memory With 24-WL Stacked Layers and 50 MB/s High-Speed Programming

A 1Tb 4b/cell 64-stacked-WL 3D NAND flash memory with 12MB/s program throughput

A 90-nm CMOS 1.8-V 2-Gb NAND flash memory for mass storage applications

A world's first product of three-dimensional vertical NAND Flash memory and beyond

High-performance 1-Gb-NAND flash memory with 0.12-μm technology

A new gradual hole injection dual-gate LIGBT

CB-BRT: a new base resistance-controlled thyristor employing a self-aligned corrugated p-base

7.6 1GB/s 2Tb NAND flash multi-chip package with frequency-boosting interface chip

7.2 A 128Gb 3b/cell V-NAND flash memory with 1Gb/s I/O rate

A 512-Gb 3-b/Cell 64-Stacked WL 3-D-NAND Flash Memory

A 1.8-Gb/s/Pin 16-Tb NAND Flash Memory Multi-Chip Package With F-Chip for High-Performance and High-Capacity Storage

A 1.2V 1.33Gb/s/pin 8Tb NAND flash memory multi-chip package employing F-chip for low power and high performance storage applications

A 1.8 V 1 Gb NAND flash memory with 0.12 mu m STI process technology

A Comparison between 63nm 8Gb and 90nm 4Gb Multi-Level Cell NAND Flash Memory for Mass Storage Application

The maximum controllable current of emitter switched thyristors employing the segmented p-base

A lateral trench-MOS bipolar-mode FET on silicon-on-insulator

Disturbance-suppressed ReRAM write algorithm for high-capacity and high-performance memory

30.3 A 512Gb 3b/Cell 7th -Generation 3D-NAND Flash Memory with 184MB/s Write Throughput and 2.0Gb/s Interface

13.1 A 1Tb 4b/cell NAND Flash Memory with tPROG=2ms, tR=110µs and 1.2Gb/s High-Speed IO Rate

13.4 A 512Gb 3-bit/Cell 3D 6th-Generation V-NAND Flash Memory with 82MB/s Write Throughput and 1.2Gb/s Interface

A fast-switching SOI SA-LIGBT without NDR region

11.4 A 512Gb 3b/cell 64-stacked WL 3D V-NAND flash memory

Cell Operation Technologies to Overcome Scale-down Issues in 3D NAND Flash Memory

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