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Evaluation of Analog Characteristics of n-Type Vertically Stacked Nanowires

2020 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), 2020, p.1-4

2020

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Performance of Stacked SOI Nanowires in a Wide Temperature Range

2021 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EuroSOI-ULIS), 2021, p.1-4

2021

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Influence of Fin Width Variation on the Electrical Characteristics of n-Type Junctionless Nanowire Transistors at High Temperatures

2020 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), 2020, p.1-4

2020

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Back bias impact on effective mobility of p-type nanowire SOI MOSFETs

2018 33rd Symposium on Microelectronics Technology and Devices (SBMicro), 2018, p.1-4

2018

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Impact of substrate bias on the mobility of n-type ɷ-gate SOI nanowire MOSFETs

2019 34th Symposium on Microelectronics Technology and Devices (SBMicro), 2019, p.1-4

2019

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Low-Frequency Noise Investigation in Long-Channel Fully Depleted Inversion Mode n-type SOI Nanowire

2018 33rd Symposium on Microelectronics Technology and Devices (SBMicro), 2018, p.1-4

2018

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New method for individual electrical characterization of stacked SOI nanowire MOSFETs

2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2017, p.1-3

2017

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Back gate influence on transistor efficiency of SOI nMOS Ω-gate nanowire down to 10nm width

2017 32nd Symposium on Microelectronics Technology and Devices (SBMicro), 2017, p.1-4

2017

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Analog performance of n- and p-FET SOI nanowires including channel length and temperature influence

2016 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), 2016, p.170-173

2016

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Study of charged island formation in nanoscale Si single-electron transistors using dual port reflectometric spectroscopy

2015 Silicon Nanoelectronics Workshop (SNW), 2015, p.1-2

2015

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Simultaneous two gate reflectometric spectroscopy of Si coupled donor-dot system

2015 Silicon Nanoelectronics Workshop (SNW), 2015, p.1-2

2015

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Fine charge sensing using a silicon nanowire for biodetection

2016 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA), 2016, p.1-2

2016

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A simple analytical Variable Barrier Transistor drain current model

EUROSOI-ULIS 2015: 2015 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, 2015, p.273-276

2015

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Dual channel radio frequency reflectometry technique for charge identification in single electron transistors

14th IEEE International Conference on Nanotechnology, 2014, p.138-140

2014

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Physically-based, multi-architecture, analytical model for junctionless transistors

Ulis 2011 Ultimate Integration on Silicon, 2011, p.1-4

2011

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Low-temperature characterization of hall and effective mobility in junctionless transistors

2014 11th International Workshop on Low Temperature Electronics (WOLTE), 2014, p.85-88

2014

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Junction technology outlook for sub-28nm FDSOI CMOS

2014 International Workshop on Junction Technology (IWJT), 2014, p.1-6

2014

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Ultra-thin body Silicon On Insulator and nanowire transistors for 22nm technology node and below

Proceedings of the 17th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2010, 2010, p.30-34

2010

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Fully textured monolithic perovskite/silicon tandem solar cells with 25.2% power conversion efficiency

Nature materials, 2018-09, Vol.17 (9), p.820-826

2018

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Improved Optics in Monolithic Perovskite/Silicon Tandem Solar Cells with a Nanocrystalline Silicon Recombination Junction

Advanced energy materials, 2018-02, Vol.8 (6), p.n/a

2018

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Simple processing of back-contacted silicon heterojunction solar cells using selective-area crystalline growth

Nature energy, 2017-04, Vol.2 (5), Article 17062

2017

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Back-Contacted Silicon Heterojunction Solar Cells: Optical-Loss Analysis and Mitigation

IEEE journal of photovoltaics, 2015-09, Vol.5 (5), p.1293-1303

2015

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Rear-emitter silicon heterojunction solar cells with atomic layer deposited ZnO:Al serving as an alternative transparent conducting oxide to In2O3:Sn

Solar energy materials and solar cells, 2019-09, Vol.200, p.109953, Article 109953

2019

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ITO/MoOx/a-Si:H(i) Hole-Selective Contacts for Silicon Heterojunction Solar Cells: Degradation Mechanisms and Cell Integration

IEEE journal of photovoltaics, 2017-11, Vol.7 (6), p.1584-1590

2017

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Aluminium-Doped Zinc Oxide Rear Reflectors for High-Efficiency Silicon Heterojunction Solar Cells

IEEE journal of photovoltaics, 2019-09, Vol.9 (5), p.1217-1224

2019

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Evaluation of Analog Characteristics of n-Type Vertically Stacked Nanowires

Performance of Stacked SOI Nanowires in a Wide Temperature Range

Influence of Fin Width Variation on the Electrical Characteristics of n-Type Junctionless Nanowire Transistors at High Temperatures

Back bias impact on effective mobility of p-type nanowire SOI MOSFETs

Impact of substrate bias on the mobility of n-type ɷ-gate SOI nanowire MOSFETs

Low-Frequency Noise Investigation in Long-Channel Fully Depleted Inversion Mode n-type SOI Nanowire

New method for individual electrical characterization of stacked SOI nanowire MOSFETs

Back gate influence on transistor efficiency of SOI nMOS Ω-gate nanowire down to 10nm width

Analog performance of n- and p-FET SOI nanowires including channel length and temperature influence

Study of charged island formation in nanoscale Si single-electron transistors using dual port reflectometric spectroscopy

Simultaneous two gate reflectometric spectroscopy of Si coupled donor-dot system

Fine charge sensing using a silicon nanowire for biodetection

A simple analytical Variable Barrier Transistor drain current model

Dual channel radio frequency reflectometry technique for charge identification in single electron transistors

Physically-based, multi-architecture, analytical model for junctionless transistors

Low-temperature characterization of hall and effective mobility in junctionless transistors

Junction technology outlook for sub-28nm FDSOI CMOS

Ultra-thin body Silicon On Insulator and nanowire transistors for 22nm technology node and below

Fully textured monolithic perovskite/silicon tandem solar cells with 25.2% power conversion efficiency

Improved Optics in Monolithic Perovskite/Silicon Tandem Solar Cells with a Nanocrystalline Silicon Recombination Junction

Simple processing of back-contacted silicon heterojunction solar cells using selective-area crystalline growth

Back-Contacted Silicon Heterojunction Solar Cells: Optical-Loss Analysis and Mitigation

Rear-emitter silicon heterojunction solar cells with atomic layer deposited ZnO:Al serving as an alternative transparent conducting oxide to In2O3:Sn

ITO/MoOx/a-Si:H(i) Hole-Selective Contacts for Silicon Heterojunction Solar Cells: Degradation Mechanisms and Cell Integration

Aluminium-Doped Zinc Oxide Rear Reflectors for High-Efficiency Silicon Heterojunction Solar Cells

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