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Study on the Evaluation of Economic Support Index for Pig Breeding in Water Network Area of Middle Reaches of Yangtze River

E3S Web of Conferences, 2018, Vol.38, p.1045

2018

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Adaptive Hashing with Sparse Modification

2016 23rd International Conference on Pattern Recognition (ICPR), 2016, p.3844-3849

2016

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Identification Method for Rice Pests with Small Sample Size Problems Combining Deep Learning and Metric Learning

Pattern Recognition and Computer Vision, p.52-65

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Weighted Group Sparse Representation Based on Robust Regression for Face Recognition

Biometric Recognition, p.42-49

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Optical Properties of Nanocrystalline (Ba,Ca)Ti03 Thin Films Grown on Pt-Coated Silicon Substrates

Ferroelectrics (Print), 2010, Vol.405, p.268-274

2010

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A Novel Approach for Shimming A Permanent Magnet for Small Scale NMR System

2008 International Conference on Information Technology and Applications in Biomedicine, 2008, p.514-517

2008

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Simultaneous reconstruction of the burn neck contracture and the upper lip using the parascapular flap extending to the arm

Journal of plastic, reconstructive & aesthetic surgery : JPRAS, 2010, Vol.63 (5), p.e476-e478

2010

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A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors

2018 IEEE International Solid - State Circuits Conference - (ISSCC), 2018, p.494-496

2018

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IEEE_Xplore

Global Polarization Effect and Spin-Orbit Coupling in Strong Interaction

Strongly Interacting Matter under Rotation, 2021, Vol.987, p.195-246

2021

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Applied Categorical and Count Data Analysis

Journal of the American Statistical Association, 2013, Vol.108 (503), p.1133-1133

Zaretzki, Russell L.

2013

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Unsupervised Reinforcement Learning of Transferable Meta-Skills for Embodied Navigation

2020 IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR), 2020, p.12120-12129

2020

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24.1 A 1Mb Multibit ReRAM Computing-In-Memory Macro with 14.6ns Parallel MAC Computing Time for CNN Based AI Edge Processors

2019 IEEE International Solid- State Circuits Conference - (ISSCC), 2019, p.388-390

2019

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IEEE_Xplore

Robust optimization over time - A new perspective on dynamic optimization problems

IEEE Congress on Evolutionary Computation, 2010, p.1-6

2010

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IEEE_Xplore

24.5 A Twin-8T SRAM Computation-In-Memory Macro for Multiple-Bit CNN-Based Machine Learning

2019 IEEE International Solid- State Circuits Conference - (ISSCC), 2019, p.396-398

2019

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IEEE_Xplore

15.4 A 22nm 2Mb ReRAM Compute-in-Memory Macro with 121-28TOPS/W for Multibit MAC Computing for Tiny AI Edge Devices

2020 IEEE International Solid- State Circuits Conference - (ISSCC), 2020, p.244-246

2020

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IEEE_Xplore

15.5 A 28nm 64Kb 6T SRAM Computing-in-Memory Macro with 8b MAC Operation for AI Edge Chips

2020 IEEE International Solid- State Circuits Conference - (ISSCC), 2020, p.246-248

2020

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IEEE_Xplore

15.2 A 28nm 64Kb Inference-Training Two-Way Transpose Multibit 6T SRAM Compute-in-Memory Macro for AI Edge Chips

2020 IEEE International Solid- State Circuits Conference - (ISSCC), 2020, p.240-242

2020

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IEEE_Xplore

MixCIM: A Hybrid-Cell-Based Computing-in-Memory Macro with Less-Data-Movement and Activation-Memory-Reuse for Depthwise Separable Neural Networks

2024 IEEE Custom Integrated Circuits Conference (CICC), 2024, p.1-2

2024

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IEEE_Xplore

A Monolithic 3-Level Single-Inductor Multiple-Output Buck Converter with State-Based Non-Linear Control Capable of Handling 1A/1.5ns Transient with On-Die LC

2024 IEEE Custom Integrated Circuits Conference (CICC), 2024, p.1-2

2024

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IEEE_Xplore

A Calibration-Free 15-level/Cell eDRAM Computing-in-Memory Macro with 3T1C Current-Programmed Dynamic-Cascoded MLC achieving 233-to-304-TOPS/W 4b MAC

2023 IEEE Custom Integrated Circuits Conference (CICC), 2023, p.1-2

2023

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IEEE_Xplore

Adaptive Variance Based Label Distribution Learning for Facial Age Estimation

Computer Vision - ECCV 2020, 2020, Vol.12368, p.379-395

2020

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Shoe Print Retrieval Algorithm Based on Improved EfficientnetV2

Biometric Recognition, p.444-454

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Classification-assisted Differential Evolution for computationally expensive problems

2011 IEEE Congress of Evolutionary Computation (CEC), 2011, p.1986-1993

2011

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IEEE_Xplore

A 28nm 16kb Aggregation and Combination Computing-in-Memory Macro with Dual-level Sparsity Modulation and Sparse-Tracking ADCs for GCNs

2024 IEEE Custom Integrated Circuits Conference (CICC), 2024, p.1-2

2024

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IEEE_Xplore

The Sorting Methods of Support Vector Clustering Based on Boundary Extraction and Category Utility

MATEC Web of Conferences, 2016, Vol.56, p.3003

2016

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Study on the Evaluation of Economic Support Index for Pig Breeding in Water Network Area of Middle Reaches of Yangtze River

Adaptive Hashing with Sparse Modification

Identification Method for Rice Pests with Small Sample Size Problems Combining Deep Learning and Metric Learning

Weighted Group Sparse Representation Based on Robust Regression for Face Recognition

Optical Properties of Nanocrystalline (Ba,Ca)Ti03 Thin Films Grown on Pt-Coated Silicon Substrates

A Novel Approach for Shimming A Permanent Magnet for Small Scale NMR System

Simultaneous reconstruction of the burn neck contracture and the upper lip using the parascapular flap extending to the arm

A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors

Global Polarization Effect and Spin-Orbit Coupling in Strong Interaction

Applied Categorical and Count Data Analysis

Unsupervised Reinforcement Learning of Transferable Meta-Skills for Embodied Navigation

24.1 A 1Mb Multibit ReRAM Computing-In-Memory Macro with 14.6ns Parallel MAC Computing Time for CNN Based AI Edge Processors

Robust optimization over time - A new perspective on dynamic optimization problems

24.5 A Twin-8T SRAM Computation-In-Memory Macro for Multiple-Bit CNN-Based Machine Learning

15.4 A 22nm 2Mb ReRAM Compute-in-Memory Macro with 121-28TOPS/W for Multibit MAC Computing for Tiny AI Edge Devices

15.5 A 28nm 64Kb 6T SRAM Computing-in-Memory Macro with 8b MAC Operation for AI Edge Chips

15.2 A 28nm 64Kb Inference-Training Two-Way Transpose Multibit 6T SRAM Compute-in-Memory Macro for AI Edge Chips

MixCIM: A Hybrid-Cell-Based Computing-in-Memory Macro with Less-Data-Movement and Activation-Memory-Reuse for Depthwise Separable Neural Networks

A Monolithic 3-Level Single-Inductor Multiple-Output Buck Converter with State-Based Non-Linear Control Capable of Handling 1A/1.5ns Transient with On-Die LC

A Calibration-Free 15-level/Cell eDRAM Computing-in-Memory Macro with 3T1C Current-Programmed Dynamic-Cascoded MLC achieving 233-to-304-TOPS/W 4b MAC

Adaptive Variance Based Label Distribution Learning for Facial Age Estimation

Shoe Print Retrieval Algorithm Based on Improved EfficientnetV2

Classification-assisted Differential Evolution for computationally expensive problems

A 28nm 16kb Aggregation and Combination Computing-in-Memory Macro with Dual-level Sparsity Modulation and Sparse-Tracking ADCs for GCNs

The Sorting Methods of Support Vector Clustering Based on Boundary Extraction and Category Utility

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