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A Novel Layout Decomposition Algorithm for Triple Patterning Lithography

IEEE transactions on computer-aided design of integrated circuits and systems, 2014-03, Vol.33 (3), p.397-408

2014

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Spacing Cost-aware Optimal and Efficient Mixed-Cell-Height Detailed Placement for DFM Considerations

2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2023, p.1-8

2023

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Graph-Based Subfield Scheduling for Electron-Beam Photomask Fabrication

IEEE transactions on computer-aided design of integrated circuits and systems, 2013-02, Vol.32 (2), p.189-201

2013

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Pressure-impulse diagram with multiple failure modes of one-way reinforced concrete slab under blast loading using SDOF method

Journal of Central South University, 2013-02, Vol.20 (2), p.510-519

2013

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Sub-60mV-swing negative-capacitance FinFET without hysteresis

2015 IEEE International Electron Devices Meeting (IEDM), 2015, p.22.6.1-22.6.4

2015

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Analysis of mm-Wave Multi-Stage Rectifier and Implementation

IEEE transactions on microwave theory and techniques, 2022-10, Vol.70 (10), p.4491-4501

2022

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Digital instrument reading recognition based on improved SSD algorithm

2024 IEEE 6th Advanced Information Management, Communicates, Electronic and Automation Control Conference (IMCEC), 2024, Vol.6, p.1839-1843

2024

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A novel layout decomposition algorithm for triple patterning lithography

DAC Design Automation Conference 2012, 2012, p.1181-1186

2012

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Provably Good Max–Min- m -Neighbor-TSP-Based Subfield Scheduling for Electron-Beam Photomask Fabrication

IEEE transactions on very large scale integration (VLSI) systems, 2018-02, Vol.26 (2), p.378-391

2018

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A 10 nm Si-based bulk FinFETs 6T SRAM with multiple fin heights technology for 25% better static noise margin

2013 Symposium on VLSI Technology, 2013, p.T218-T219

2013

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Estimating the detection stability of a Si nanowire sensor using an additional charging electrode

2013 IEEE International Reliability Physics Symposium (IRPS), 2013, p.ME.1.1-ME.1.4

2013

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A novel layout decomposition algorithm for triple patterning lithography

Proceedings of the 49th Annual Design Automation Conference, 2012, p.1185-1190

2012

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TMD FinFET with 4 nm thin body and back gate control for future low power technology

2015 IEEE International Electron Devices Meeting (IEDM), 2015, p.32.2.1-32.2.4

2015

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Implementation of Novel Scheduling Methods for Dual-arm Cluster Tools with Multiple-time Reentrant flows based on Petri Nets

2023 IEEE International Conference on Networking, Sensing and Control (ICNSC), 2023, Vol.1, p.1-6

2023

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High performance poly Si junctionless transistors with sub-5nm conformally doped layers by molecular monolayer doping and microwave incorporating CO2 laser annealing for 3D stacked ICs applications

2015 IEEE International Electron Devices Meeting (IEDM), 2015, p.6.2.1-6.2.4

2015

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Provably good max-min-m-neighbor-TSP-based subfield scheduling for electron-beam photomask fabrication

2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2015, p.388-395

2015

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Hybrid Si/TMD 2D electronic double channels fabricated using solid CVD few-layer-MoS2 stacking for Vth matching and CMOS-compatible 3DFETs

2014 IEEE International Electron Devices Meeting, 2014, p.33.5.1-33.5.4

2014

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Capacitance Minimization Clock Synthesis with Blockage-Avoiding Hybrid-Structure Network

2019 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), 2019, p.1-2

2019

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A digital gauge reading algorithm based on an improved YOLOv8

2024 IEEE 6th Advanced Information Management, Communicates, Electronic and Automation Control Conference (IMCEC), 2024, Vol.6, p.607-611

2024

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Automatic Reading Method for Pointer Meters Based on Improved Deeplabv3

2023 IEEE 7th Information Technology and Mechatronics Engineering Conference (ITOEC), 2023, Vol.7, p.1958-1963

2023

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Adaptive fuzzy filter algorithm for real-time video denoising

2008 9th International Conference on Signal Processing, 2008, p.1287-1291

2008

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An Algorithm to Calculate the Diameter of Triple-Loop Networks TL(N;1,s,s+2)

2010 International Conference on Internet Technology and Applications, 2010, p.1-3

2010

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Meta-Learning Traffic Pattern Adaptation for DRL-Based Radio Resource Management

2024 IEEE International Conference on Communications Workshops (ICC Workshops), 2024, p.227-232

2024

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SpeedER: A Supervised Encoder-Decoder Driven Engine for Effective Resistance Estimation of Power Delivery Networks

2022 ACM/IEEE 4th Workshop on Machine Learning for CAD (MLCAD), 2022, p.55-61

2022

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A 10 nm Si-based bulk FinFETs 6T SRAM with multiple fin heights technology for 25% better static noise margin

2013 Symposium on VLSI Circuits, 2013, p.T218-T219

2013

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A Novel Layout Decomposition Algorithm for Triple Patterning Lithography

Spacing Cost-aware Optimal and Efficient Mixed-Cell-Height Detailed Placement for DFM Considerations

Graph-Based Subfield Scheduling for Electron-Beam Photomask Fabrication

Pressure-impulse diagram with multiple failure modes of one-way reinforced concrete slab under blast loading using SDOF method

Sub-60mV-swing negative-capacitance FinFET without hysteresis

Analysis of mm-Wave Multi-Stage Rectifier and Implementation

Digital instrument reading recognition based on improved SSD algorithm

A novel layout decomposition algorithm for triple patterning lithography

Provably Good Max–Min- m -Neighbor-TSP-Based Subfield Scheduling for Electron-Beam Photomask Fabrication

A 10 nm Si-based bulk FinFETs 6T SRAM with multiple fin heights technology for 25% better static noise margin

Estimating the detection stability of a Si nanowire sensor using an additional charging electrode

A novel layout decomposition algorithm for triple patterning lithography

TMD FinFET with 4 nm thin body and back gate control for future low power technology

Implementation of Novel Scheduling Methods for Dual-arm Cluster Tools with Multiple-time Reentrant flows based on Petri Nets

High performance poly Si junctionless transistors with sub-5nm conformally doped layers by molecular monolayer doping and microwave incorporating CO2 laser annealing for 3D stacked ICs applications

Provably good max-min-m-neighbor-TSP-based subfield scheduling for electron-beam photomask fabrication

Hybrid Si/TMD 2D electronic double channels fabricated using solid CVD few-layer-MoS2 stacking for Vth matching and CMOS-compatible 3DFETs

Capacitance Minimization Clock Synthesis with Blockage-Avoiding Hybrid-Structure Network

A digital gauge reading algorithm based on an improved YOLOv8

Automatic Reading Method for Pointer Meters Based on Improved Deeplabv3

Adaptive fuzzy filter algorithm for real-time video denoising

An Algorithm to Calculate the Diameter of Triple-Loop Networks TL(N;1,s,s+2)

Meta-Learning Traffic Pattern Adaptation for DRL-Based Radio Resource Management

SpeedER: A Supervised Encoder-Decoder Driven Engine for Effective Resistance Estimation of Power Delivery Networks

A 10 nm Si-based bulk FinFETs 6T SRAM with multiple fin heights technology for 25% better static noise margin

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