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Optimal negative sequence current suppression strategy without phase‐locked loop based on the control of clustered new energy power stations

IET generation, transmission & distribution, 2023-10, Vol.17 (19), p.4248-4257

2023

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A 5.91–8.94GHz phase‐locked loop in 65 nm CMOS for 5G applications

Microwave and optical technology letters, 2023-04, Vol.65 (4), p.975-980

2023

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A 224–448 MHz low‐power fully integrated phase‐locked loop using 0.18‐μm CMOS process

Microwave and optical technology letters, 2017-07, Vol.59 (7), p.1750-1755

2017

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Power Electronics in Renewable Energy Systems

2019

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A 5 GHz fully-integrated low-power phase-locked loop using 0.18-μm CMOS technology

Microwave and optical technology letters, 2016-07, Vol.58 (7), p.1534-1537

2016

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Comparative study of single-phase phase-locked loops for grid-connected inverters under non-ideal grid conditions

CSEE Journal of Power and Energy Systems, 2022-01, Vol.8 (1), p.155-164

2022

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77 GHz phase‐locked loop for automobile radar system in 90‐nm CMOS technology

Microwave and optical technology letters, 2018-03, Vol.60 (3), p.546-555

2018

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A Self-Biased Low-Jitter Process-Insensitive Phase-Locked Loop for 1.25Gb/s-6.25Gb/s SerDes

Chinese Journal of Electronics, 2018-09, Vol.27 (5), p.1009-1014

2018

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Multi-PLL with two-stage fusion to mitigate ionospheric scintillation effects on GPS receivers

Radio science, 2015-07, Vol.50 (7), p.630-641

2015

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Implementation of a low-cost phase-locked loop clock-recovery module for 40-Gb/s optical receivers

Microwave and optical technology letters, 2006-02, Vol.48 (2), p.312-315

2006

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Adaptive filtering with robust controller for improvement of inertial response of wind turbine

International transactions on electrical energy systems, 2019-10, Vol.29 (10), p.n/a

2019

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From 5g To 6g And Beyond: The 7 Cs Of Future Communications

Kiat Seng Yeo

2023

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An Area-Efficient Low-Jitter Fractional Output Divider With Replica-DTC-Free Background Calibration

IEEE journal of solid-state circuits, 2024-05, p.1-11

2024

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A Radiation-Hardened 15-22-GHz Frequency Synthesizer in 22-nm FinFET

IEEE journal of solid-state circuits, 2024-03, p.1-14

2024

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IEEE_Xplore

A 6 to 12-GHz Fractional- N Frequency Synthesizer With a Digital Technique to Counter Modulus-Dependent Feedback Divider Delays

IEEE journal of solid-state circuits, 2024-03, p.1-13

2024

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IEEE_Xplore

Recent advances in synchronization techniques for grid-tied PV system: A review

Energy reports, 2021-11, Vol.7, p.6581-6599

2021

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Small-Signal Stability Analysis of Type-4 Wind in Series-Compensated Networks

IEEE transactions on energy conversion, 2019-09, Vol.35 (1)

2019

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A Fractional- N Sampling PLL With a Merged Constant-Slope DTC and Sampling PD

IEEE journal of solid-state circuits, 2024-02, p.1-11

2024

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IEEE_Xplore

Nonlinear analysis of the synchronous reference frame phase-locked loop under unbalanced grid voltage

Nonlinear dynamics, 2024-06, Vol.112 (11), p.9225-9243

2024

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Low-Phase-Noise 20-GHz Phase-Locked Loop Using Harmonic-Tuned VCO Assisting With gm -Boosting Technique

IEEE transactions on very large scale integration (VLSI) systems, 2023-10, Vol.31 (10), p.1-5

2023

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IEEE_Xplore

Sine augmented scaled arithmetic optimization algorithm for frequency regulation of a virtual inertia control based microgrid

ISA transactions, 2023-07, Vol.138, p.534-545

2023

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Mathematical modelling and simulation of a wideband PLL for application in frequency synthesizers

e-Prime, 2023-09, Vol.5, p.100216, Article 100216

2023

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Impact of Frequency Anti-windup Limiter on Synchronization Stability of Grid Feeding Converter

CSEE Journal of Power and Energy Systems, 2023-09, Vol.9 (5), p.1676-1687

2023

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Speed sensorless control of a bearingless induction motor based on sliding mode observer and phase-locked loop

ISA transactions, 2022-04, Vol.123, p.346-356

2022

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Mobile GPS carrier phase tracking using a novel intelligent dual-loop receiver

International journal of satellite communications and networking, 2008-03, Vol.26 (2), p.119-139

2008

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Optimal negative sequence current suppression strategy without phase‐locked loop based on the control of clustered new energy power stations

A 5.91–8.94GHz phase‐locked loop in 65 nm CMOS for 5G applications

A 224–448 MHz low‐power fully integrated phase‐locked loop using 0.18‐μm CMOS process

Power Electronics in Renewable Energy Systems

A 5 GHz fully-integrated low-power phase-locked loop using 0.18-μm CMOS technology

Comparative study of single-phase phase-locked loops for grid-connected inverters under non-ideal grid conditions

77 GHz phase‐locked loop for automobile radar system in 90‐nm CMOS technology

A Self-Biased Low-Jitter Process-Insensitive Phase-Locked Loop for 1.25Gb/s-6.25Gb/s SerDes

Multi-PLL with two-stage fusion to mitigate ionospheric scintillation effects on GPS receivers

Implementation of a low-cost phase-locked loop clock-recovery module for 40-Gb/s optical receivers

Adaptive filtering with robust controller for improvement of inertial response of wind turbine

From 5g To 6g And Beyond: The 7 Cs Of Future Communications

An Area-Efficient Low-Jitter Fractional Output Divider With Replica-DTC-Free Background Calibration

A Radiation-Hardened 15-22-GHz Frequency Synthesizer in 22-nm FinFET

A 6 to 12-GHz Fractional- N Frequency Synthesizer With a Digital Technique to Counter Modulus-Dependent Feedback Divider Delays

Recent advances in synchronization techniques for grid-tied PV system: A review

Small-Signal Stability Analysis of Type-4 Wind in Series-Compensated Networks

A Fractional- N Sampling PLL With a Merged Constant-Slope DTC and Sampling PD

Nonlinear analysis of the synchronous reference frame phase-locked loop under unbalanced grid voltage

Low-Phase-Noise 20-GHz Phase-Locked Loop Using Harmonic-Tuned VCO Assisting With gm -Boosting Technique

Sine augmented scaled arithmetic optimization algorithm for frequency regulation of a virtual inertia control based microgrid

Mathematical modelling and simulation of a wideband PLL for application in frequency synthesizers

Impact of Frequency Anti-windup Limiter on Synchronization Stability of Grid Feeding Converter

Speed sensorless control of a bearingless induction motor based on sliding mode observer and phase-locked loop

Mobile GPS carrier phase tracking using a novel intelligent dual-loop receiver

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