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0.0012 mm2, 8 mW, single-to-differential converter with < 1.1% data cross error and < 3.4 ps RMS jitter up to 14 Gbit/s data rate

Electronics letters, 2013-05, Vol.49 (11), p.692-694

2013

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A 0.0014 mm2, 1.18 TΩ Segmented Duty-Cycled Resistor Replacing Pseudo-Resistor for Neural Recording Interface Circuits

2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2022, p.62-63

2022

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IEEE_Xplore

A 0.001mm2 100µW on-chip temperature sensor with ±1.95 °C (3σ) Inaccuracy in 32nm SOI CMOS

2012 IEEE International Symposium on Circuits and Systems (ISCAS), 2012, p.1999-2002

2012

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IEEE_Xplore

A 0.002‐mm2 8‐bit 1‐MS/s low‐power time‐based DAC (T‐DAC)

IET circuits, devices & systems, 2021-11, Vol.15 (8), p.738-744

2021

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A 0.0027-mm2 9.5-bit 50-MS/s all-digital A/D converter TAD in 65-nm digital CMOS

2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009), 2009, p.271-274

2009

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IEEE_Xplore

A 0.003 mm ^ 10 b 240 MS/s 0.7 mW SAR ADC in 28 nm CMOS With Digital Error Correction and Correlated-Reversed Switching

IEEE journal of solid-state circuits, 2015-06, Vol.50 (6), p.1382-1398

2015

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IEEE_Xplore

A 0.0045- \hbox^ 32.4- \mu\hbox Two-Stage Amplifier for pF-to-nF Load Using CM Frequency Compensation

IEEE transactions on circuits and systems. II, Express briefs, 2015-03, Vol.62 (3), p.246-250

2015

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IEEE_Xplore

0.0045 mm2 15.8 µW three-stage amplifier driving 10×-wide (0.15–1.5 nF) capacitive loads with >50° phase margin

Electronics letters, 2015-03, Vol.51 (6), p.454-456

2015

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A 0.004mm2 single-channel 6-bit 1.25GS/s SAR ADC in 40nm CMOS

2013 IEEE Asian Solid-State Circuits Conference (A-SSCC), 2013, p.277-280

2013

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IEEE_Xplore

A 0.0058-mm ^ Inductor-Less CMOS Active Balun With Gain and Phase Errors Within - 0.1 \pm 0.2 dB and - 0.18 \pm 1.17 ^ From DC to 8 GHz

IEEE transactions on circuits and systems. I, Regular papers, 2023-03, p.1-14

2023

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IEEE_Xplore

A 0.009mm2, 0-230mA Wide-range Load Current Output Capacitor-less Low Dropout Regulator for High Bandwidth Memory parallel IOs

2022 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems (VLSID), 2022, p.6-10

2022

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IEEE_Xplore

A 0.009mm2, 6.5mW, 6.2b-ENOB 2.5GS/s Flash-and-VCO-Based Subranging ADC Using a Resistor-Ladder-Based Residue Shifter

2023 IEEE Custom Integrated Circuits Conference (CICC), 2023, p.1-2

2023

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IEEE_Xplore

0.01-50 GHz power detector MMICs

2015 IEEE 15th Mediterranean Microwave Symposium (MMS), 2015, p.1-4

2015

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A 0.01-8-GHz (12.5 Gb/s) 4[Formula Omitted]4 CMOS Switch Matrix

IEEE transactions on microwave theory and techniques, 2012-02, Vol.60 (2), p.381-386

2012

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0.012 mm2 800 µW 0.1–6.4 GHz multi-protocol PLL with 14 psrms integrated jitter in 28 nm FD-SOI

Electronics letters, 2016-09, Vol.52 (18), p.1518-1520

2016

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A 0.013 mm2, 5 μW, DC-Coupled Neural Signal Acquisition IC With 0.5 V Supply

IEEE journal of solid-state circuits, 2012, Vol.47 (1), p.232-243

2012

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0.013 mm2, kHz-to-GHz-bandwidth, third-order all-pole lowpass filter with 0.52-to-1.11 pW/pole/Hz efficiency

Electronics letters, 2013-10, Vol.49 (21), p.1340-1342

2013

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A 0.015mm2 63fJ/conversion-step 10-bit 220MS/s SAR ADC with 1.5b/step redundancy and digital metastability correction

Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012, p.1-4

2012

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IEEE_Xplore

A 0.016-mm2 144-μW Three-Stage Amplifier Capable of Driving 1-to-15 nF Capacitive Load With >0.95-MHz GBW

IEEE journal of solid-state circuits, 2013, Vol.48 (2), p.527-540

2013

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A 0.02-mm2 9-Bit 50-MS/s Cyclic ADC in 90-nm Digital CMOS Technology

IEEE journal of solid-state circuits, 2010-03, Vol.45 (3), p.610-619

2010

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A 0.024 mm2 4.9 fJ 10-bit 2 MS/s SAR ADC in 65 nm CMOS

2012 Proceedings of the ESSCIRC (ESSCIRC), 2012, p.377-380

2012

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IEEE_Xplore

A 0.024mm2 8b 400MS/s SAR ADC with 2b/cycle and resistive DAC in 65nm CMOS

2011 IEEE International Solid-State Circuits Conference, 2011, p.188-190

2011

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IEEE_Xplore

A 0.02mm2 100dB-DR Impedance Monitoring IC with PWM-Dual GRO Architecture

2019 Symposium on VLSI Circuits, 2019, p.C60-C61

2019

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IEEE_Xplore

A 0.02mm2 65nm CMOS 30MHz BW all-digital differential VCO-based ADC with 64dB SNDR

2010 Symposium on VLSI Circuits, 2010, p.155-156

2010

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IEEE_Xplore

A 0.03 mm2 Inductorless 50 Gb/s Multiplexer for Josephson Arbitrary Waveform Synthesizers

2022 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2022, p.124-127

2022

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0.0012 mm2, 8 mW, single-to-differential converter with < 1.1% data cross error and < 3.4 ps RMS jitter up to 14 Gbit/s data rate

A 0.0014 mm2, 1.18 TΩ Segmented Duty-Cycled Resistor Replacing Pseudo-Resistor for Neural Recording Interface Circuits

A 0.001mm2 100µW on-chip temperature sensor with ±1.95 °C (3σ) Inaccuracy in 32nm SOI CMOS

A 0.002‐mm2 8‐bit 1‐MS/s low‐power time‐based DAC (T‐DAC)

A 0.0027-mm2 9.5-bit 50-MS/s all-digital A/D converter TAD in 65-nm digital CMOS

A 0.003 mm ^ 10 b 240 MS/s 0.7 mW SAR ADC in 28 nm CMOS With Digital Error Correction and Correlated-Reversed Switching

A 0.0045- \hbox^ 32.4- \mu\hbox Two-Stage Amplifier for pF-to-nF Load Using CM Frequency Compensation

0.0045 mm2 15.8 µW three-stage amplifier driving 10×-wide (0.15–1.5 nF) capacitive loads with >50° phase margin

A 0.004mm2 single-channel 6-bit 1.25GS/s SAR ADC in 40nm CMOS

A 0.0058-mm ^ Inductor-Less CMOS Active Balun With Gain and Phase Errors Within - 0.1 \pm 0.2 dB and - 0.18 \pm 1.17 ^ From DC to 8 GHz

A 0.009mm2, 0-230mA Wide-range Load Current Output Capacitor-less Low Dropout Regulator for High Bandwidth Memory parallel IOs

A 0.009mm2, 6.5mW, 6.2b-ENOB 2.5GS/s Flash-and-VCO-Based Subranging ADC Using a Resistor-Ladder-Based Residue Shifter

0.01-50 GHz power detector MMICs

A 0.01-8-GHz (12.5 Gb/s) 4[Formula Omitted]4 CMOS Switch Matrix

0.012 mm2 800 µW 0.1–6.4 GHz multi-protocol PLL with 14 psrms integrated jitter in 28 nm FD-SOI

A 0.013 mm2, 5 μW, DC-Coupled Neural Signal Acquisition IC With 0.5 V Supply

0.013 mm2, kHz-to-GHz-bandwidth, third-order all-pole lowpass filter with 0.52-to-1.11 pW/pole/Hz efficiency

A 0.015mm2 63fJ/conversion-step 10-bit 220MS/s SAR ADC with 1.5b/step redundancy and digital metastability correction

A 0.016-mm2 144-μW Three-Stage Amplifier Capable of Driving 1-to-15 nF Capacitive Load With >0.95-MHz GBW

A 0.02-mm2 9-Bit 50-MS/s Cyclic ADC in 90-nm Digital CMOS Technology

A 0.024 mm2 4.9 fJ 10-bit 2 MS/s SAR ADC in 65 nm CMOS

A 0.024mm2 8b 400MS/s SAR ADC with 2b/cycle and resistive DAC in 65nm CMOS

A 0.02mm2 100dB-DR Impedance Monitoring IC with PWM-Dual GRO Architecture

A 0.02mm2 65nm CMOS 30MHz BW all-digital differential VCO-based ADC with 64dB SNDR

A 0.03 mm2 Inductorless 50 Gb/s Multiplexer for Josephson Arbitrary Waveform Synthesizers

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