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SAPIENS: A 64-kb RRAM-Based Non-Volatile Associative Memory for One-Shot Learning and Inference at the Edge

IEEE transactions on electron devices, 2021-12, Vol.68 (12), p.6637-6643

2021

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Hybrid Spin-Orbit Torque/Spin-Transfer Torque-Based Multibit Cell for Area-Efficient Magnetic Random Access Memory

IEEE transactions on electron devices, 2023-12, Vol.70 (12), p.6318-6323

2023

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Nanoelectromechanical-Switch-Based Ternary Content-Addressable Memory (NEMTCAM)

IEEE transactions on electron devices, 2021-10, Vol.68 (10), p.4903-4909

2021

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BEOL-Compatible Bilayer Reprogrammable One-Time Programmable Memory for Low-Voltage Operation

IEEE transactions on electron devices, 2023-03, Vol.70 (3), p.1042-1047

2023

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Evolution of Phase-Change Memory for the Storage-Class Memory and Beyond

IEEE transactions on electron devices, 2020-04, Vol.67 (4), p.1394-1406

2020

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A Novel Computing-in-Memory Platform Based on Hybrid Spintronic/CMOS Memory

IEEE transactions on electron devices, 2022-04, Vol.69 (4), p.1698-1705

2022

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ReRAM: History, Status, and Future

IEEE transactions on electron devices, 2020-04, Vol.67 (4), p.1420-1433

Chen, Yangyin

2020

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High-Performance Operation and Solder Reflow Compatibility in BEOL-Integrated 16-kb HfO2: Si-Based 1T-1C FeRAM Arrays

IEEE transactions on electron devices, 2022-04, Vol.69 (4), p.2108-2114

2022

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A Study on Practically Unlimited Endurance of STT-MRAM

IEEE transactions on electron devices, 2017-09, Vol.64 (9), p.3639-3646

2017

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Efficient Implementation of Boolean and Full-Adder Functions With 1T1R RRAMs for Beyond Von Neumann In-Memory Computing

IEEE transactions on electron devices, 2018-10, Vol.65 (10), p.4659-4666

2018

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Training a Probabilistic Graphical Model With Resistive Switching Electronic Synapses

IEEE transactions on electron devices, 2016-12, Vol.63 (12), p.5004-5011

2016

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Low Temperature SoIC Bonding and Stacking Technology for 12-/16-Hi High Bandwidth Memory (HBM)

IEEE transactions on electron devices, 2020-12, Vol.67 (12), p.5343-5348

2020

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Redundancy and Analog Slicing for Precise In-Memory Machine Learning-Part II: Applications and Benchmark

IEEE transactions on electron devices, 2021-09, Vol.68 (9), p.4379-4383

2021

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Phase-Change Memory-Towards a Storage-Class Memory

IEEE transactions on electron devices, 2017-11, Vol.64 (11), p.4374-4385

2017

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A Highly Compact Nonvolatile Ternary Content Addressable Memory (TCAM) With Ultralow Power and 200-ps Search Operation

IEEE transactions on electron devices, 2022-08, Vol.69 (8), p.4259-4264

2022

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Simulations of Ultralow-Power Nonvolatile Cells for Random-Access Memory

IEEE transactions on electron devices, 2020-02, Vol.67 (2), p.474-480

2020

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Resistive Switching Device Technology Based on Silicon Oxide for Improved ON-OFF Ratio-Part I: Memory Devices

IEEE transactions on electron devices, 2018-01, Vol.65 (1), p.115-121

2018

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Novel Vertical Channel-All-Around (CAA) In-Ga-Zn-O FET for 2T0C-DRAM With High Density Beyond 4F2 by Monolithic Stacking

IEEE transactions on electron devices, 2022-04, Vol.69 (4), p.2196-2202

2022

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Spray-Coated, Volatile and Nonvolatile, Two-Terminal, Resistive Switching Memory Devices Comprising Liquid-Exfoliated Black Phosphorus and Graphene Layers

IEEE transactions on electron devices, 2020-12, Vol.67 (12), p.5484-5489

2020

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Fully On-Chip MAC at 14 nm Enabled by Accurate Row-Wise Programming of PCM-Based Weights and Parallel Vector-Transport in Duration-Format

IEEE transactions on electron devices, 2021-12, Vol.68 (12), p.6629-6636

2021

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Redundancy and Analog Slicing for Precise In-Memory Machine Learning-Part I: Programming Techniques

IEEE transactions on electron devices, 2021-09, Vol.68 (9), p.4373-4378

2021

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High-Density Embedded 3-D Stackable Via RRAM in 16-nm FinFET CMOS Logic Process

IEEE transactions on electron devices, 2024-06, Vol.71 (6), p.3614-3619

2024

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Experimental Demonstration of Memristor-Aided Logic (MAGIC) Using Valence Change Memory (VCM)

IEEE transactions on electron devices, 2020-08, Vol.67 (8), p.3115-3122

2020

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Dual-Functional Hybrid Selectorless RRAM and Selection Device for Memory Array Application

IEEE transactions on electron devices, 2021-09, Vol.68 (9), p.4363-4367

2021

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Thorough Understanding of Retention Time of Z2FET Memory Operation

IEEE transactions on electron devices, 2019-01, Vol.66 (1), p.383-388

2019

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SAPIENS: A 64-kb RRAM-Based Non-Volatile Associative Memory for One-Shot Learning and Inference at the Edge

Hybrid Spin-Orbit Torque/Spin-Transfer Torque-Based Multibit Cell for Area-Efficient Magnetic Random Access Memory

Nanoelectromechanical-Switch-Based Ternary Content-Addressable Memory (NEMTCAM)

BEOL-Compatible Bilayer Reprogrammable One-Time Programmable Memory for Low-Voltage Operation

Evolution of Phase-Change Memory for the Storage-Class Memory and Beyond

A Novel Computing-in-Memory Platform Based on Hybrid Spintronic/CMOS Memory

ReRAM: History, Status, and Future

High-Performance Operation and Solder Reflow Compatibility in BEOL-Integrated 16-kb HfO2: Si-Based 1T-1C FeRAM Arrays

A Study on Practically Unlimited Endurance of STT-MRAM

Efficient Implementation of Boolean and Full-Adder Functions With 1T1R RRAMs for Beyond Von Neumann In-Memory Computing

Training a Probabilistic Graphical Model With Resistive Switching Electronic Synapses

Low Temperature SoIC Bonding and Stacking Technology for 12-/16-Hi High Bandwidth Memory (HBM)

Redundancy and Analog Slicing for Precise In-Memory Machine Learning-Part II: Applications and Benchmark

Phase-Change Memory-Towards a Storage-Class Memory

A Highly Compact Nonvolatile Ternary Content Addressable Memory (TCAM) With Ultralow Power and 200-ps Search Operation

Simulations of Ultralow-Power Nonvolatile Cells for Random-Access Memory

Resistive Switching Device Technology Based on Silicon Oxide for Improved ON-OFF Ratio-Part I: Memory Devices

Novel Vertical Channel-All-Around (CAA) In-Ga-Zn-O FET for 2T0C-DRAM With High Density Beyond 4F2 by Monolithic Stacking

Spray-Coated, Volatile and Nonvolatile, Two-Terminal, Resistive Switching Memory Devices Comprising Liquid-Exfoliated Black Phosphorus and Graphene Layers

Fully On-Chip MAC at 14 nm Enabled by Accurate Row-Wise Programming of PCM-Based Weights and Parallel Vector-Transport in Duration-Format

Redundancy and Analog Slicing for Precise In-Memory Machine Learning-Part I: Programming Techniques

High-Density Embedded 3-D Stackable Via RRAM in 16-nm FinFET CMOS Logic Process

Experimental Demonstration of Memristor-Aided Logic (MAGIC) Using Valence Change Memory (VCM)

Dual-Functional Hybrid Selectorless RRAM and Selection Device for Memory Array Application

Thorough Understanding of Retention Time of Z2FET Memory Operation

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