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Fast and Precise Worst-Case Interference Placement for Shared Cache Analysis

ACM transactions on embedded computing systems, 2016-07, Vol.15 (3), p.1-26

2016

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Toward a Scalable Working Set Size Estimation Method and Its Application for Chip Multiprocessors

IEEE transactions on computers, 2014-06, Vol.63 (6), p.1567-1579

2014

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Pragmatic integrated scheduling for clustered VLIW architectures

Software, practice & experience, 2008-03, Vol.38 (3), p.227-257

2008

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Refining Cache Behavior Prediction Using Cache Miss Paths

ACM transactions on embedded computing systems, 2017-11, Vol.16 (4), p.1-26

2017

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Microarchitecture Sensitive Empirical Models for Compiler Optimizations

Code Generation and Optimization: Proceedings of the International Symposium on Code Generation and Optimization; 11-14 Mar. 2007, 2007, p.131-143

2007

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IR2V EC: LLVM IR Based Scalable Program Embeddings

ACM transactions on architecture and code optimization, 2020-12, Vol.17 (4), p.1-27

2020

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Precise shared cache analysis using optimal interference placement

2014 IEEE 19th Real-Time and Embedded Technology and Applications Symposium (RTAS), 2014, p.125-134

2014

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Scheduling expression trees for delayed-load architectures

Journal of systems architecture, 2002-12, Vol.48 (4), p.151-173

2002

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An incremental basic block instruction scheduler

Journal of systems architecture, 1998-11, Vol.45 (3), p.179-203

1998

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Classics

Resonance, 2012-11, Vol.17 (11), p.1100-1115

Srikant, Y. N.

2012

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WCET estimation for executables in the presence of data caches

International Conference On Embedded Software: Proceedings of the 7th ACM & IEEE international conference on Embedded software; 30 Sept.-03 Oct. 2007, 2007, p.203-212

2007

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Partial redundancy elimination: a simple, pragmatic, and provably correct algorithm

Science of computer programming, 2003-07, Vol.48 (1), p.1-20

2003

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Profiling k-Iteration Paths: A Generalization of the Ball-Larus Profiling Algorithm

2009 International Symposium on Code Generation and Optimization, 2009, p.70-80

2009

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Parallel parsing of arithmetic expressions

IEEE transactions on computers, 1990-01, Vol.39 (1), p.130-132

Srikant, Y.N.

1990

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Implications of Program Phase Behavior on Timing Analysis

2011 15th Workshop on Interaction between Compilers and Computer Architectures, 2011, p.71-79

2011

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Integrated energy-aware cyclic and acyclic scheduling for clustered VLIW processors

2010 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum (IPDPSW), 2010, p.1-8

2010

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Compiler-assisted leakage energy optimization for clustered VLIW architectures

International Conference On Embedded Software: Proceedings of the 6th ACM & IEEE International conference on Embedded software; 22-25 Oct. 2006, 2006, p.233-241

2006

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A parallel algorithm for the minimization of finite state automata

International journal of computer mathematics, 1990-01, Vol.32 (1-2), p.1-11

Srikant, Y. N.

1990

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Integrated temporal and spatial scheduling for extended operand clustered VLIW processors

Conference On Computing Frontiers: Proceedings of the 1st conference on Computing frontiers; 14-16 Apr. 2004, 2004, p.457-470

2004

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A class of problems efficiently solvable on mesh-connected computers including dynamic expression evaluation

Information processing letters, 1989-10, Vol.32 (6), p.305-311

1989

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INTACTE: an interconnect area, delay, and energy estimation tool for microarchitectural explorations

International Conference on Compilers, Architecture and Synthesis for Embedded Systems: Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems; 30 Sept.-03 Oct. 2007, 2007, p.238-247

2007

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