UB Paderborn / Katalog / Suche / in CDI

International Conference on Hardware Software Codesign: Proceedings of the tenth international symposium on Hardware/software codesign; 06-08 May 2002, 2002, p.109-114

2002

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IEEE_Xplore

A Platform to Analyze DDR3 DRAM's Power and Retention Time

IEEE design and test, 2017-08, Vol.34 (4), p.52-59

2017

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IEEE_Xplore

Invited: Approximate computing with partially unreliable dynamic random access memory - Approximate DRAM

2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC), 2016, p.1-4

2016

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Seven recipes for setting your FPGA on fire – A cookbook on heat generators

Microprocessors and microsystems, 2014-11, Vol.38 (8), p.911-919

2014

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RIVER: Reconfigurable Flow and Fabric for Real-Time Signal Processing on FPGAs

ACM transactions on reconfigurable technology and systems, 2014-08, Vol.7 (3), p.1-16

2014

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Self-Awareness as a Model for Designing and Operating Heterogeneous Multicores

ACM transactions on reconfigurable technology and systems, 2014-06, Vol.7 (2), p.1-18

2014

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Revisiting Information Hiding: Reflections on Classical and Nonclassical Modularity

ECOOP 2011 – Object-Oriented Programming, p.155-178

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Energy optimization with worst-case deadline guarantee for pipelined multiprocessor systems

2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013, p.45-50

2013

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IEEE_Xplore

Combined system synthesis and communication architecture exploration for MPSoCs

2009 Design, Automation & Test in Europe Conference & Exhibition, 2009, p.472-477

2009

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IEEE_Xplore

EPICURE: A partitioning and co-design framework for reconfigurable computing

Microprocessors and microsystems, 2006-09, Vol.30 (6), p.367-387

2006

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PSCP: a scalable parallel ASIP architecture for reactive systems

Design, Automation, and Test in Europe: Proceedings of the conference on Design, automation and test in Europe; 23-26 Feb. 1998, 1998, p.370-376

1998

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IEEE_Xplore

SoftRM: Self-Organized Fault-Tolerant Resource Management for Failure Detection and Recovery in NoC Based Many-Cores

ACM transactions on embedded computing systems, 2017-10, Vol.16 (5s), p.1-19

2017

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Design Space Optimization of Shared Memory Architecture in Accelerator-rich Systems

ACM transactions on design automation of electronic systems, 2021-04, Vol.26 (4), p.1-31

2021

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ZyPR: End-to-End Build Tool and Runtime Manager for Partial Reconfiguration of FPGA SoCs at the Edge

ACM transactions on reconfigurable technology and systems, 2023-09, Vol.16 (3), p.1-33

2023

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FTT-NAS: Discovering Fault-tolerant Convolutional Neural Architecture

ACM transactions on design automation of electronic systems, 2021-11, Vol.26 (6), p.1-24

2021

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Power-Temperature Stability and Safety Analysis for Multiprocessor Systems

ACM transactions on embedded computing systems, 2017-10, Vol.16 (5s), p.1-19

2017

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Advanced Simulation of Droplet Microfluidics

ACM journal on emerging technologies in computing systems, 2019-07, Vol.15 (3), p.1-16

2019

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Achieving cost-efficient fail-operational behavior based on inherent redundancy at the system level

Microprocessors and microsystems, 2021-11, Vol.87, p.104380, Article 104380

2021

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Memory Carousel: LLVM-Based Bitwise Wear Leveling for Nonvolatile Main Memory

Software-Managed Read and Write Wear-Leveling for Non-Volatile Main Memory

Swift-CNN: Leveraging PCM Memory's Fast Write Mode to Accelerate CNNs

Application and Thermal-reliability-aware Reinforcement Learning Based Multi-core Power Management

Defragmentation of Tasks in Many-Core Architecture

SPMPool: Runtime SPM Management for Memory-Intensive Applications in Embedded Many-Cores

DodOrg—A Self-adaptive Organic Many-core Architecture

A novel codesign approach based on distributed virtual machines

A Platform to Analyze DDR3 DRAM's Power and Retention Time

Invited: Approximate computing with partially unreliable dynamic random access memory - Approximate DRAM

Seven recipes for setting your FPGA on fire – A cookbook on heat generators

RIVER: Reconfigurable Flow and Fabric for Real-Time Signal Processing on FPGAs

Self-Awareness as a Model for Designing and Operating Heterogeneous Multicores

Revisiting Information Hiding: Reflections on Classical and Nonclassical Modularity

Energy optimization with worst-case deadline guarantee for pipelined multiprocessor systems

Combined system synthesis and communication architecture exploration for MPSoCs

EPICURE: A partitioning and co-design framework for reconfigurable computing

PSCP: a scalable parallel ASIP architecture for reactive systems

SoftRM: Self-Organized Fault-Tolerant Resource Management for Failure Detection and Recovery in NoC Based Many-Cores

Design Space Optimization of Shared Memory Architecture in Accelerator-rich Systems

ZyPR: End-to-End Build Tool and Runtime Manager for Partial Reconfiguration of FPGA SoCs at the Edge

FTT-NAS: Discovering Fault-tolerant Convolutional Neural Architecture

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