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Ultra-Low Noise Defect Probing Instrument for Defect Spectroscopy of MOS Transistors

IEEE transactions on device and materials reliability, 2020-06, Vol.20 (2), p.242-250

Waltl, Michael

2020

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Aging and Sintered Layer Defect Detection of Discrete MOSFETs Using Frequency Domain Reflectometry Associated With Parasitic Resistance

IEEE transactions on device and materials reliability, 2024-03, Vol.24 (1), p.1-1

2024

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An automated cucumber inspection system based on neural network

Journal of food process engineering, 2022-09, Vol.45 (9), p.n/a

2022

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Machine Learning Approach for Prediction of Point Defect Effect in FinFET

IEEE transactions on device and materials reliability, 2021-06, Vol.21 (2), p.252-257

2021

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Extraction of Charge Trapping Kinetics of Defects From Single-Defect Measurements

IEEE transactions on device and materials reliability, 2024-06, Vol.24 (2), p.168-173

2024

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Revealing the Impact of Gate Area Scaling on Charge Trapping Employing SiO2Transistors

IEEE transactions on device and materials reliability, 2023-09, Vol.23 (3), p.355

2023

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LCHC-DFT: A Low-Cost High-Coverage Design-for-Testability Technique to Detect Hard-to-Detect Faults in STT-MRAMs in the Presence of Process Variations

IEEE transactions on device and materials reliability, 2022-12, Vol.22 (4), p.477-487

2022

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Assessing AMS-RF Test Quality by Defect Simulation

IEEE transactions on device and materials reliability, 2019-03, Vol.19 (1), p.55-63

2019

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A deep reinforcement learning‐based maintenance optimization for vacuum packaging machines considering product quality degradation

Journal of food process engineering, 2023-11, Vol.46 (11)

2023

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CD-DFT: A Current-Difference Design-for-Testability to Detect Short Defects of STT-MRAM Under Process Variations

IEEE transactions on device and materials reliability, 2021-09, Vol.21 (3), p.436-443

2021

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Extraction of Statistical Gate Oxide Parameters From Large MOSFET Arrays

IEEE transactions on device and materials reliability, 2020-06, Vol.20 (2), p.251-257

2020

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Universal Dielectric Breakdown Modeling Under Off-State TDDB for Ultra-Scaled Device From 130nm to 28nm Nodes and Beyond

IEEE transactions on device and materials reliability, 2024-06, Vol.24 (2), p.174-183

2024

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On the Distribution of Single Defect Threshold Voltage Shifts in SiON Transistors

IEEE transactions on device and materials reliability, 2021-06, Vol.21 (2), p.199-206

2021

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Did You Really Test That Interlock?: The Importance of Early Identification of Defects

IEEE industry applications magazine, 2024-07, Vol.30 (4), p.69-74

Sullivan, Paul B.

2024

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ESI launches simulation software for composites

Reinforced plastics (London), 2017-01, Vol.61 (1), p.23

2017

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Cell-Aware Defect Diagnosis of Customer Returns Based on Supervised Learning

IEEE transactions on device and materials reliability, 2020-06, Vol.20 (2), p.329-340

2020

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Procedural Defect Modeling for Virtual Surface Inspection Environments

IEEE computer graphics and applications, 2023-03, Vol.PP (2), p.1-10

2023

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Correlation Study of Bulk Si Stress and Lithography Defects Using Polarized Stress Imager

IEEE transactions on device and materials reliability, 2020-03, Vol.20 (1), p.221-223

2020

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Multiple Defects Cause Degradation After High Field Stress in AlGaN/GaN HEMTs

IEEE transactions on device and materials reliability, 2018-09, Vol.18 (3), p.364-376

2018

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A DLTS Study on Deep Trench Processing-Induced Trap States in Silicon Photodiodes

IEEE transactions on device and materials reliability, 2024-06, Vol.24 (2), p.161-167

2024

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Effect of Hydrogen Molecule Release on NBTI by Low-Temperature Pre-Treatment in P-Channel Power VDMOS Transistors

IEEE transactions on device and materials reliability, 2024-06, Vol.24 (2), p.211-218

2024

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Failure Characterization of Carbon Nanotube FETs Under Process Variations: Technology Scaling Issues

IEEE transactions on device and materials reliability, 2016-06, Vol.16 (2), p.164-171

2016

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Online Calculation of the Increase in Thermal Resistance Caused by Solder Fatigue for IGBT Modules

IEEE transactions on device and materials reliability, 2017-12, Vol.17 (4), p.785-794

2017

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Single Pulse Charge Pumping Technique Improvement for Interface-States Profiling in the Channel of MOSFET Devices

IEEE transactions on device and materials reliability, 2023-12, Vol.23 (4), p.521-529

2023

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Overview of Bias Temperature Instability in Scaled DRAM Logic for Memory Transistors

IEEE transactions on device and materials reliability, 2020-06, Vol.20 (2), p.258-268

2020

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Ultra-Low Noise Defect Probing Instrument for Defect Spectroscopy of MOS Transistors

Aging and Sintered Layer Defect Detection of Discrete MOSFETs Using Frequency Domain Reflectometry Associated With Parasitic Resistance

An automated cucumber inspection system based on neural network

Machine Learning Approach for Prediction of Point Defect Effect in FinFET

Extraction of Charge Trapping Kinetics of Defects From Single-Defect Measurements

Revealing the Impact of Gate Area Scaling on Charge Trapping Employing SiO2Transistors

LCHC-DFT: A Low-Cost High-Coverage Design-for-Testability Technique to Detect Hard-to-Detect Faults in STT-MRAMs in the Presence of Process Variations

Assessing AMS-RF Test Quality by Defect Simulation

A deep reinforcement learning‐based maintenance optimization for vacuum packaging machines considering product quality degradation

CD-DFT: A Current-Difference Design-for-Testability to Detect Short Defects of STT-MRAM Under Process Variations

Extraction of Statistical Gate Oxide Parameters From Large MOSFET Arrays

Universal Dielectric Breakdown Modeling Under Off-State TDDB for Ultra-Scaled Device From 130nm to 28nm Nodes and Beyond

On the Distribution of Single Defect Threshold Voltage Shifts in SiON Transistors

Did You Really Test That Interlock?: The Importance of Early Identification of Defects

ESI launches simulation software for composites

Cell-Aware Defect Diagnosis of Customer Returns Based on Supervised Learning

Procedural Defect Modeling for Virtual Surface Inspection Environments

Correlation Study of Bulk Si Stress and Lithography Defects Using Polarized Stress Imager

Multiple Defects Cause Degradation After High Field Stress in AlGaN/GaN HEMTs

A DLTS Study on Deep Trench Processing-Induced Trap States in Silicon Photodiodes

Effect of Hydrogen Molecule Release on NBTI by Low-Temperature Pre-Treatment in P-Channel Power VDMOS Transistors

Failure Characterization of Carbon Nanotube FETs Under Process Variations: Technology Scaling Issues

Online Calculation of the Increase in Thermal Resistance Caused by Solder Fatigue for IGBT Modules

Single Pulse Charge Pumping Technique Improvement for Interface-States Profiling in the Channel of MOSFET Devices

Overview of Bias Temperature Instability in Scaled DRAM Logic for Memory Transistors

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