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Scalable Effort Hardware Design

IEEE transactions on very large scale integration (VLSI) systems, 2014-09, Vol.22 (9), p.2004-2016

2014

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An Energy-Efficient Heterogeneous System for Embedded Learning and Classification

IEEE embedded systems letters, 2011-03, Vol.3 (1), p.42-45

2011

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AQuA: Analytical Quality Assessment for Optimizing Video Analytics Systems

2021 IEEE/ACM Symposium on Edge Computing (SEC), 2021, p.135-147

2021

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Semantic Multi-Resolution Communications

2023 IEEE Globecom Workshops (GC Wkshps), 2023, p.1591-1596

2023

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Elixir: A System to Enhance Data Quality for Multiple Analytics on a Video Stream

2023 IEEE International Conference on Smart Computing (SMARTCOMP), 2023, p.98-107

2023

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Exploring Software Partitions for Fast Security Processing on a Multiprocessor Mobile SoC

IEEE transactions on very large scale integration (VLSI) systems, 2007-06, Vol.15 (6), p.699-710

2007

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Deep Learning-Based Real-Time Quality Control of Standard Video Compression for Live Streaming

ICC 2024 - IEEE International Conference on Communications, 2024, p.4851-4856

2024

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Computing approximately, and efficiently

2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015, p.748-751

2015

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Approximate computing: An integrated hardware approach

2013 Asilomar Conference on Signals, Systems and Computers, 2013, p.111-117

2013

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A transitive closure algorithm for test generation

IEEE transactions on computer-aided design of integrated circuits and systems, 1993-07, Vol.12 (7), p.1015-1028

1993

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Primitive delay faults: identification, testing, and design for testability

IEEE transactions on computer-aided design of integrated circuits and systems, 1999-06, Vol.18 (6), p.669-684

1999

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A framework for efficient and scalable execution of domain-specific templates on GPUs

2009 IEEE International Symposium on Parallel & Distributed Processing, 2009, p.1-12

2009

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Testable Path Delay Fault Cover for Sequential Circuits

Journal of Information Science and Engineering, 2000-09, Vol.16 (5), p.673-686

2000

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Energy models for delay testing

IEEE transactions on computer-aided design of integrated circuits and systems, 1995-06, Vol.14 (6), p.728-739

1995

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Deep Learning-Based Real-Time Rate Control for Live Streaming on Wireless Networks

2024 IEEE International Conference on Machine Learning for Communication and Networking (ICMLCN), 2024, p.263-267

2024

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A Practical Vector Restoration Technique for Large Sequential Circuits

Journal of electronic testing, 2000-10, Vol.16 (5), p.521

2000

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Design of testable sequential circuits by repositioning flip-flops

Journal of electronic testing, 1995-08, Vol.7 (1-2), p.105-114

1995

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An exact algorithm for selecting partial scan flip-flops

Journal of electronic testing, 1995-08, Vol.7 (1-2), p.83-93

1995

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Test-Volume Reduction in Systems-on-a-Chip Using Heterogeneous and Multilevel Compression Techniques

IEEE transactions on computer-aided design of integrated circuits and systems, 2006-10, Vol.25 (10), p.2193-2206

2006

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Synthesis of initializable asynchronous circuits

IEEE transactions on very large scale integration (VLSI) systems, 1996-06, Vol.4 (2), p.254-263

1996

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Finite state machine synthesis with fault tolerant test function

Journal of electronic testing, 1993-02, Vol.4 (1), p.57-69

1993

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A scalable scan-path test point insertion technique to enhance delay fault coverage for standard scan designs

IEEE transactions on computer-aided design of integrated circuits and systems, 2006-08, Vol.25 (8), p.1555-1564

2006

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Efficient Software Architecture for IPSec Acceleration Using a Programmable Security Processor

2008 Design, Automation and Test in Europe, 2008, p.1148-1153

2008

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Energy minimization and design for testability

Journal of electronic testing, 1994-02, Vol.5 (1), p.57-66

1994

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Power monitors: a framework for system-level power estimation using heterogeneous power models

18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design, 2005, p.579-585

2005

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Scalable Effort Hardware Design

An Energy-Efficient Heterogeneous System for Embedded Learning and Classification

AQuA: Analytical Quality Assessment for Optimizing Video Analytics Systems

Semantic Multi-Resolution Communications

Elixir: A System to Enhance Data Quality for Multiple Analytics on a Video Stream

Exploring Software Partitions for Fast Security Processing on a Multiprocessor Mobile SoC

Deep Learning-Based Real-Time Quality Control of Standard Video Compression for Live Streaming

Computing approximately, and efficiently

Approximate computing: An integrated hardware approach

A transitive closure algorithm for test generation

Primitive delay faults: identification, testing, and design for testability

A framework for efficient and scalable execution of domain-specific templates on GPUs

Testable Path Delay Fault Cover for Sequential Circuits

Energy models for delay testing

Deep Learning-Based Real-Time Rate Control for Live Streaming on Wireless Networks

A Practical Vector Restoration Technique for Large Sequential Circuits

Design of testable sequential circuits by repositioning flip-flops

An exact algorithm for selecting partial scan flip-flops

Test-Volume Reduction in Systems-on-a-Chip Using Heterogeneous and Multilevel Compression Techniques

Synthesis of initializable asynchronous circuits

Finite state machine synthesis with fault tolerant test function

A scalable scan-path test point insertion technique to enhance delay fault coverage for standard scan designs

Efficient Software Architecture for IPSec Acceleration Using a Programmable Security Processor

Energy minimization and design for testability

Power monitors: a framework for system-level power estimation using heterogeneous power models

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