IEEE electron device letters, 2022-06, Vol.43 (6), p.854-857
2022
Details
- Autor(en) / Beteiligte
- Titel
- Integration of Ferroelectric HfxZr1-xO2 on Vertical III-V Nanowire Gate-All-Around FETs on Silicon
- Ist Teil von
- IEEE electron device letters, 2022-06, Vol.43 (6), p.854-857
- Ort / Verlag
- New York: IEEE
- Erscheinungsjahr
- 2022
- Link zum Volltext
- Quelle
- IEEE Xplore
- Beschreibungen/Notizen
- We demonstrate a successful process scheme for the integration of a CMOS-compatible ferroelectric gate stack on a scaled vertical InAs nanowire gate-all-around MOSFET on silicon. The devices show promising device characteristics with nanosecond write time and large memory window of >1.5 V. In the current implementation, the device performance is mainly limited by access resistance, which is attributed to the thermal sensitivity of InAs. The findings indicate that the ferroelectricity is not intrinsically preventing future improvements of scaled III-V FeFETs.
- Sprache
- Englisch
- Identifikatoren
- ISSN: 0741-3106eISSN: 1558-0563DOI: 10.1109/LED.2022.3171597Titel-ID: cdi_swepub_primary_oai_lup_lub_lu_se_816728fc_0179_44b8_a55f_d961eae1417b
- Format
- –
- Schlagworte
- Annan elektroteknik och elektronik, Electrical Engineering, Electronic Engineering, Information Engineering, Elektroteknik och elektronik, Engineering and Technology, FeFETs, ferroelectric field effect transistor (FeFET), Ferroelectricity, Ferroelectrics, gate-all-around MOSFET, hafnium zirconium oxide, InAs, Logic gates, MOSFET, Nanoscale devices, Nanowires, Other Electrical Engineering, Electronic Engineering, Information Engineering, Silicon, Switches, Teknik, Temperature measurement, vertical nanowire