Details

Autor(en) / Beteiligte

• Yang, Ming-Jui
• Chien, Chao-Hsin
• Lu, Yi-Hsien
• Shen, Chih-Yen
• Huang, Tiao-Yuan

Titel

Electrical Properties of Low-Temperature-Compatible P-Channel Polycrystalline-Silicon TFTs Using High-[Formula Omitted] Gate Dielectrics

Ist Teil von

• IEEE transactions on electron devices, 2008-04, Vol.55 (4), p.1027-1034

Ort / Verlag

New York: The Institute of Electrical and Electronics Engineers, Inc. (IEEE)

Erscheinungsjahr

2008

Quelle

IEEE Xplore

Beschreibungen/Notizen

• In this paper, we describe a systematic study of the electrical properties of low-temperature-compatible p-channel polycrystalline-silicon thin-film transistors (poly-Si TFTs) using HfO@@d2@ and HfSiO@@dx@, high-k gate dielectrics. Because of their larger gate capacitance density, the TFTs containing the high-k gate dielectrics exhibited superior device performance in terms of higher I@@don@/I@@doff@ current ratios, lower subthreshold swings (SSs), and lower threshold voltages (V@@dth@), relative to conventional deposited-SiO@@d2@, albeit with slightly higher OFF-state currents. The TFTs incorporating HfSiO@@dx@, as the gate dielectric had ca. 1.73 times the mobility (mu@@dFE@) relative to that of the deposited-SiO@@d2@ TFTs; in contrast, the HfO@@d2@ TFTs exhibited inferior mobility. We investigated the mechanism for the mobility degradation in these HfO@@d2@ TFTs. The immunity of the HfSiO@@dx@, TFTs was better than that of the HfO@@d2@ TFTs-in terms of their V@@dth@ shift, SS degradation, mu@@dFE@ degradation, and drive current deterioration-against negative bias temperature instability stressing. Thus, we believe that HfSiO@@dx@, rather than HfO@@d2@, is a potential candidate for use as a gate-dielectric material in future high-performance poly-Si TFTs.