Details

Autor(en) / Beteiligte

• Bagheri, R.
• Mirzaei, A.
• Chehrazi, S.
• Heidari, M.E.
• Minjae Lee
• Mikhemar, M.
• Wai Tang
• Abidi, A.A.

Titel

An 800-MHz-6-GHz Software-Defined Wireless Receiver in 90-nm CMOS

Ist Teil von

• IEEE journal of solid-state circuits, 2006-12, Vol.41 (12), p.2860-2876

Ort / Verlag

New York, NY: IEEE

Erscheinungsjahr

2006

Link zum Volltext

• IEEE_Xplore

Quelle

IEL

Beschreibungen/Notizen

• A software-defined radio receiver is designed from a low-power ADC perspective, exploiting programmability of windowed integration sampler and clock-programmable discrete-time analog filters. To cover the major frequency bands in use today, a wideband RF front-end, including the low-noise amplifier (LNA) and a wide tuning-range synthesizer, spanning over 800 MHz to 6 GHz is designed. The wideband LNA provides 18-20 dB of maximum gain and 3-3.5 dB of noise figure over 800 MHz to 6 GHz. A low 1/f noise and high-linearity mixer is designed which utilizes the passive mixer core properties and provides around +70 dBm IIP2 over the bandwidth of operation. The entire receiver circuits are implemented in 90-nm CMOS technology. Programmability of the receiver is tested for GSM and 802.11g standards