IEEE transactions on electron devices, 2008-12, Vol.55 (12), p.3507-3516
2008
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Details
- Autor(en) / Beteiligte
- Titel
- Characterization and Optimization of Sub-32-nm FinFET Devices for ESD Applications
- Ist Teil von
- IEEE transactions on electron devices, 2008-12, Vol.55 (12), p.3507-3516
- Ort / Verlag
- New York, NY: IEEE
- Erscheinungsjahr
- 2008
- Quelle
- IEEE/IET Electronic Library
- Beschreibungen/Notizen
- Electrostatic discharge performance of advanced FinFETs shows a delicate sensitivity to device layout and to processing parameters. Both N- and P-type MOS FinFET devices are characterized in bipolar operation mode as a function of layout parameters such as gate length and fin width. The impact of well implants, selective epitaxial growth, and strain is studied.
- Sprache
- Englisch
- Identifikatoren
- ISSN: 0018-9383eISSN: 1557-9646DOI: 10.1109/TED.2008.2006547Titel-ID: cdi_proquest_miscellaneous_875074934
- Format
- –
- Schlagworte
- Applied sciences, Compound structure devices, Devices, Electronic equipment and fabrication. Passive components, printed wiring boards, connectics, Electronics, Electrostatic discharge, Electrostatic discharge (ESD), Electrostatic discharges, Epitaxial growth, Exact sciences and technology, FinFET, FinFETs, human body model (HBM), Implants, Metal oxide semiconductors, Optimization, Process parameters, Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices, silicon on insulator (SOI), Silicon on insulator technology, Strain, Transistors, transmission line pulse (TLP)