Details

Autor(en) / Beteiligte

• Schlosser, M.
• Bhuwalka, K.K.
• Sauter, M.
• Zilbauer, T.
• Sulima, T.
• Eisele, I.

Titel

Fringing-Induced Drain Current Improvement in the Tunnel Field-Effect Transistor With High- \kappa Gate Dielectrics

Ist Teil von

• IEEE transactions on electron devices, 2009-01, Vol.56 (1), p.100-108

Ort / Verlag

New York, NY: IEEE

Erscheinungsjahr

2009

Quelle

IEEE

Beschreibungen/Notizen

• The tunnel field-effect transistor (tunnel FET) is a promising candidate for future CMOS technology. Its device characteristics have been subject to a variety of experimental and theoretical studies. In this paper, we evaluate the influence of using a high-kappa gate dielectric in the tunnel FET compared to a standard silicon oxide with same equivalent oxide thickness, which exhibits a quite different behavior compared to a conventional MOSFET due to its totally different working principle. It turns out that the fringing field effect, while deteriorating conventional MOSFET characteristics, leads to a much higher on-current comparable with actual conventional MOSFETs, a subthreshold slope of the tunnel FET lower than the theoretical limit for conventional MOSFETs, and a massive improved inverter delay, underlining its prospect for future applications. This leads to the conclusion that high-kappa materials with permittivities > 30 can advantageously be used in CMOS technology, giving rise to further technological development.