Details

Autor(en) / Beteiligte

• Unno, Y
• Kamada, S
• Yamamura, K
• Yamamoto, H
• Hanagaki, K
• Hori, R
• Ikegami, Y
• Nakamura, K
• Takubo, Y
• Takashima, R

Titel

Development of n super(+)-in-p planar pixel quadsensor flip-chipped with FE-I4 readout ASICs

Ist Teil von

• Journal of instrumentation, 2017-01, Vol.12, p.C01084-C01084

Erscheinungsjahr

2017

Quelle

Alma/SFX Local Collection

Beschreibungen/Notizen

• We have developed flip-chip modules applicable to the pixel detector for the HL-LHC. New radiation-tolerant n super(+)-in-p planar pixel sensors of a size of four FE-I4 application-specific integrated circuits (ASICs) are laid out in a 6-in wafer. Variation in readout connection for the pixels at the boundary of ASICs is implemented in the design of quadsensors. Bump bonding technology is developed for four ASICs onto one quadsensor. Both sensors and ASICs are thinned to 150 [mu]m before bump bonding, and are held flat with vacuum chucks. Using lead-free SnAg solder bumps, we encounter deficiency with large areas of disconnected bumps after thermal stress treatment, including irradiation. Surface oxidation of the solder bumps is identified as a critical source of this deficiency after bump bonding trials, using SnAg bumps with solder flux, indium bumps, and SnAg bumps with a newly-introduced hydrogen-reflow process. With hydrogen-reflow, we establish flux-less bump bonding technology with SnAg bumps, appropriate for mass production of the flip-chip modules with thin sensors and thin ASICs.