Details

Autor(en) / Beteiligte

• Engel, H.
• Alt, T.
• Breitner, T.
• Ramirez, A. Gomez
• Kollegger, T.
• Krzewicki, M.
• Lehrbach, J.
• Rohr, D.
• Kebschull, U.

Titel

The ALICE high-level trigger read-out upgrade for LHC Run 2

Ist Teil von

• Journal of instrumentation, 2016-01, Vol.11 (1), p.C01041-C01041

Erscheinungsjahr

2016

Quelle

Alma/SFX Local Collection

Beschreibungen/Notizen

• The ALICE experiment uses an optical read-out protocol called Detector Data Link (DDL) to connect the detectors with the computing clusters of Data Acquisition (DAQ) and High-Level Trigger (HLT). The interfaces of the clusters to these optical links are realized with FPGA-based PCI-Express boards. The High-Level Trigger is a computing cluster dedicated to the online reconstruction and compression of experimental data. It uses a combination of CPU, GPU and FPGA processing. For Run 2, the HLT has replaced all of its previous interface boards with the Common Read-Out Receiver Card (C-RORC) to enable read-out of detectors at high link rates and to extend the pre-processing capabilities of the cluster. The new hardware also comes with an increased link density that reduces the number of boards required. A modular firmware approach allows different processing and transport tasks to be built from the same source tree. A hardware pre-processing core includes cluster finding already in the C-RORC firmware. State of the art interfaces and memory allocation schemes enable a transparent integration of the C-RORC into the existing HLT software infrastructure. Common cluster management and monitoring frameworks are used to also handle C-RORC metrics. The C-RORC is in use in the clusters of ALICE DAQ and HLT since the start of LHC Run 2.