Details

Autor(en) / Beteiligte

• Jin, Tae Hwan
• Han, Hong Gul
• Kim, Tae Wook

Titel

A 0.7-dB NF, +8.2-dBm IIP3 CMOS low noise amplifier using frequency selective feedback

Ist Teil von

• International journal of circuit theory and applications, 2016-01, Vol.44 (1), p.21-37

Ort / Verlag

Bognor Regis: Blackwell Publishing Ltd

Erscheinungsjahr

2016

Link zum Volltext

Quelle

Wiley Online Library Journals Frontfile Complete

Beschreibungen/Notizen

• Summary A CMOS amplifier employing the frequency selective feedback technique using a shunt feedback capacitor is designed and measured. The proposed amplifier can achieve a high IIP3 (input referred third‐order intercept point) by reducing the third‐ and second‐order nonlinearity contributions to the IMD3 (third‐order intermodulation distortion), which is accomplished using a capacitor as the frequency selective element. Also, the shunt feedback capacitor improves the noise performance of the amplifier. By applying the technique to a cascode LNA using 0.18‐µm CMOS technology, we obtain the NF of 0.7 dB, an IIP3 of +8.2 dBm, and a gain of 15.1 dB at 14.4 mW of power consumption at 900 MHz. Copyright © 2015 John Wiley & Sons, Ltd. A CMOS amplifier employing the frequency selective feedback technique using a shunt feedback capacitor is designed and measured. The proposed frequency selective feedback can achieve a high IIP3 by reducing the third‐ and second‐order nonlinearity contributions to the IMD3, which is accomplished using the frequency selective characteristics of a feedback element, such as a capacitor. Also, the shunt feedback capacitor slightly improves the noise performance of the amplifier.