Details

Autor(en) / Beteiligte

• Ahmed, Shakil
• Samsudin, Khairulmizam
• Ramli, Abdul Rahman
• Rokhani, Fakhrul Zaman

Titel

Advanced Encryption Standard-XTS implementation in field programmable gate array hardware

Ist Teil von

• Security and communication networks, 2015-02, Vol.8 (3), p.516-522

Ort / Verlag

London: Blackwell Publishing Ltd

Erscheinungsjahr

2015

Link zum Volltext

Quelle

EZB Free E-Journals

Beschreibungen/Notizen

• In recent years, security has been a common concern for the data in‐transit between communication networks as well as data at rest in storage devices. The Institute of Electrical and Electronics Engineers P1619 Security in Storage Working Group proposed a standard for the security of static data. One of the components of this standard is the cryptographic protection of data on block storage devices. This standard uses Advanced Encryption Standard‐XEX weakable block cipher with ciphertext stealing as a building block for the protection of data. Few field programmable gate array‐based implementations of this mode that achieve sustainable throughput for block storage devices exist. This work proposes and demonstrates a different scheme that achieves better efficiency compared with current implementations. Copyright © 2014 John Wiley & Sons, Ltd. In this paper, a highly efficient storage encryption solution is proposed. This solution is achieved by mapping the Advanced Encryption Standard (AES)‐XEX weakable block cipher with ciphertext stealing (XTS) algorithm in field programmable gate array hardware. Our proposed scheme provides the highest efficiency in comparison with existing AES‐XTS solutions. In the given architecture, we have implemented the AES‐XTS algorithm in parallel fashion for encryption/decryption of two chucks of 128‐bit data in parallel. The solution has also incorporated key expansion whereas existing solutions does not. The solution has been mapped on Virtex 5 field programmable gate array.