Details

Autor(en) / Beteiligte

• Shankaran, Gokul V.
• Dogruoz, Mehmet Baris
• Abarham, Mehdi

Titel

Thermal Analysis and Design of Electronics Systems Across Scales Using State-Space Modeling Technique

Ist Teil von

• IEEE transactions on components, packaging, and manufacturing technology (2011), 2021-08, Vol.11 (8), p.1223-1234

Ort / Verlag

Piscataway: IEEE

Erscheinungsjahr

2021

Quelle

IEEE Electronic Library Online

Beschreibungen/Notizen

• Under a given set of boundary conditions (BCs), the thermal performance of an electronic system is generally evaluated based on its steady-state response to constant power loads and thermal BCs that are time-averaged values of the actual transient or cyclic loads and BCs. Such analysis may produce accurate results if the time dependence of the power cycles and thermal BCs is small. Ideally, transient thermal analyses with actual time-dependent BCs and power cycles should be performed to determine the steady-state behavior. While being less overwhelming compared to laboratory experiments, fully time-dependent computational fluid dynamics (CFD) analysis still requires a large amount of CPU time. In order to overcome this large computational cost, several approximate models, such as resistor-capacitor (<inline-formula> <tex-math notation="LaTeX">R </tex-math></inline-formula>-<inline-formula> <tex-math notation="LaTeX">C </tex-math></inline-formula>) thermal network approaches, have been developed. Although reasonably accurate, these models require rigorous curve-fitting effort followed by an optimization process, which only makes them practical for relatively simple systems. The present study builds a state-space model applicable to heat transfer problems and makes comparisons with the <inline-formula> <tex-math notation="LaTeX">R </tex-math></inline-formula>-<inline-formula> <tex-math notation="LaTeX">C </tex-math></inline-formula> networks. The state-space model is later applied to determine the transient thermal behavior of a complex system, namely, a multidie SOIC chip over a printed circuit board (PCB), with a significant reduction in CPU time and no compromise on the accuracy. Finally, as a demonstration of systemic thermal design, an optimization exercise is performed on the above state-space model, in which the power cycles on individual die elements are controlled to limit the maximum temperature on the package die.