Details

Autor(en) / Beteiligte

• Choi, Ji Hun
• Yang, Jong‐Heon
• Pi, Jae‐Eun
• Hwang, Chi‐Young
• Kim, Yong‐Hae
• Kim, Gi Heon
• Kim, Hee‐Ok
• Hwang, Chi‐Sun

Titel

The new route for realization of 1‐μm‐pixel‐pitch high‐resolution displays

Ist Teil von

• Journal of the Society for Information Display, 2019-08, Vol.27 (8), p.487-496

Ort / Verlag

Campbell: Wiley Subscription Services, Inc

Erscheinungsjahr

2019

Quelle

Wiley-Blackwell Journals

Beschreibungen/Notizen

• A new pixel structure for the realization of a 1‐μm‐pixel‐pitch display was developed. This structure, named vertically stacked thin‐film transistor (VST), was based on the conventional back‐channel etched thin‐film transistor (TFT), but all the layers except the horizontal gate line were vertically stacked on the embedded data line, enabling the implementation of high‐resolution display panels. The VST device with a channel length of 1 μm showed a high field effect mobility of more than 50 cm2/Vs and low subthreshold slope of 78 mV per decade. It also shows a high uniform electrical characteristic over the entire 6‐in. wafer. The development of a new pixel architecture is expected to enable the implementation of 1‐μm‐pixel‐pitch high‐resolution displays such as spatial light modulators for digital holograms. A new pixel structure for the realization of a 1‐μm‐pixel‐pitch display was developed. This structure, named vertically stacked TFT (VST), showed stable switching performance and device uniformity. Based on the suggested scheme, 1‐μm‐pixel‐pitch array was successfully fabricated. The development of a new pixel architecture is expected to enable the implementation of high‐resolution displays such as SLMs for digital holography.