Details

Autor(en) / Beteiligte

• Hu, L.
• Ma, Y.
• Cai, W.
• Mu, X.
• Xu, Y.
• Wang, W.
• Wu, Y.
• Wang, H.
• Song, Y. P.
• Zou, C.-L.
• Girvin, S. M.
• Duan, L-M.
• Sun, L.

Titel

Quantum error correction and universal gate set operation on a binomial bosonic logical qubit

Ist Teil von

• Nature physics, 2019-05, Vol.15 (5), p.503-508

Ort / Verlag

London: Nature Publishing Group

Erscheinungsjahr

2019

Link zum Volltext

Quelle

Alma/SFX Local Collection

Beschreibungen/Notizen

• Logical qubit encoding and quantum error correction (QEC) protocols have been experimentally demonstrated in various physical systems with multiple physical qubits, generally without reaching the break-even point, at which the lifetime of the quantum information exceeds that of the single best physical qubit within the logical qubit. Logical operations are challenging, owing to the necessary non-local operations at the physical level, making bosonic logical qubits that rely on higher Fock states of a single oscillator attractive, given their hardware efficiency. QEC that reaches the break-even point and single logical-qubit operations have been demonstrated using the bosonic cat code. Here, we experimentally demonstrate repetitive QEC approaching the break-even point of a single logical qubit encoded in a hybrid system consisting of a superconducting circuit and a bosonic cavity using a binomial bosonic code. This is achieved while simultaneously maintaining full control of the single logical qubit, including encoding, decoding and a high-fidelity universal quantum gate set with 97% average process fidelity. The corrected logical qubit has a lifetime 2.8 times longer than that of its uncorrected counterpart. We also perform a Ramsey experiment on the corrected logical qubit, reporting coherence twice as long as for the uncorrected case.Repeated error correction creates a logical qubit encoded in the hybrid state of a superconducting circuit and a bosonic cavity, which is shown to be fully controllable under a universal single-qubit gate set.