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Autor(en) / Beteiligte
Titel
0.3-4.3 GHz Frequency-Accurate Fractional-[Formula Omitted] Frequency Synthesizer With Integrated VCO and Nested Mixed-Radix Digital [Formula Omitted]-[Formula Omitted] Modulator-Based Divider Controller
Ist Teil von
  • IEEE journal of solid-state circuits, 2014-07, Vol.49 (7), p.1595
Ort / Verlag
New York: The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Erscheinungsjahr
2014
Quelle
IEEE Xplore
Beschreibungen/Notizen
  • If the modulus of the digital delta-sigma modulator (DΔΣM) in a fractional-[Formula Omitted] frequency synthesizer is a power of two, then the output frequency is constrained to be a rational multiple of the phase detector frequency [Formula Omitted], where the denominator of the rational multiplier is a power of two. If the required output frequency is not related to [Formula Omitted] in this way, one is forced to approximate the ratio by using a small programmable modulus DΔΣM or a very large power-of-two modulus. Both of these solutions involve additional hardware. Furthermore, the programmable modulus solution can suffer from spurs, while the large power of two lacks accuracy. This paper presents a new solution, based on mixed-radix algebra, where the required ratio is formed by combining two different moduli. The programmable modulus solves the accuracy problem, while the large power-of-two modulus minimizes the spur content. In addition, the phase detector can be clocked at high speed. This paper explains the theoretical foundations of the method, elaborates a design methodology, and presents measured results for an 0.18 µm SiGe BiCMOS prototype. [PUBLICATION ABSTRACT]
Sprache
Englisch
Identifikatoren
ISSN: 0018-9200
eISSN: 1558-173X
DOI: 10.1109/JSSC.2014.2322095
Titel-ID: cdi_proquest_journals_1549544045
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