Details

Autor(en) / Beteiligte

• Ming-Da Tsai
• Chin-Shen Lin
• Chi-Hsueh Wang
• Chun-Hsien Lien
• Wang, Huei

Titel

A 0.1-23-GHz SiGe BiCMOS analog multiplier and mixer based on attenuation-compensation technique

Ist Teil von

• 2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers, 2004, p.417-420

Ort / Verlag

Piscataway NJ: IEEE

Erscheinungsjahr

2004

Link zum Volltext

• IEEE_Xplore

Quelle

IEEE Electronic Library (IEL)

Beschreibungen/Notizen

• A SiGe BiCMOS broadband mixer and analog multiplier using LC ladder matching networks and attenuation-compensation method were first proposed. This broadband mixer achieves measured conversion gain of 19 dB with a 3-dB bandwidth from 0.1 to 23 GHz. The mixer was fabricated in a commercial 0.35-/spl mu/m SiGe BiCMOS technology and demonstrated the highest gain-bandwidth product of operation among previously reported MMIC mixers. As an analog multiplier, the measured sensitivity is better than 3000 V/W from 0.1 to 25 GHz with 50-/spl Omega/ output impedance. The chip area is 1.5/spl times/1 mm/sup 2/ including testing pad. The performance of this circuit represents a state-of-the-art result of the MMIC broadband mixers using standard silicon-based technologies.