Details

Autor(en) / Beteiligte

• Bhuwalka, K.K.
• Schulze, J.
• Eisele, I.

Titel

Scaling the vertical tunnel FET with tunnel bandgap modulation and gate workfunction engineering

Ist Teil von

• IEEE transactions on electron devices, 2005-05, Vol.52 (5), p.909-917

Ort / Verlag

New York, NY: IEEE

Erscheinungsjahr

2005

Quelle

IEEE Electronic Library Online

Beschreibungen/Notizen

• In this paper, we look into the scaling issues of a vertical tunnel field-effect transistor (FET). The device, a gated p-i-n diode based on silicon, showed gate-controlled band-to-band tunneling from the heavily doped source to the intrinsic channel. An exponentially increasing input characteristics, perfect saturation in the output characteristics, and off-currents of the order of 1 fA//spl mu/m for sub-100-nm channel lengths were observed. Further, with a /spl delta/p/sup +/ SiGe layer at the p-source end, improvements in the device performance in terms of on-current, threshold voltage and subthreshold swing were shown, albeit trading off the off-currents which increase with Ge content x. We show here that the tunnel FET performance is nearly independent of channel length scaling L and with /spl delta/p/sup +/ SiGe layer, scaling t/sub ox/ is not critical to tunnel FET scaling. Further, with gate workfunction engineering, the tunnel FET can be tuned to achieve a high on-current as well as very low off-currents. Due to the perfect saturation in the output characteristics, the device looks good for sub-100-nm low-power analog devices.