Details

Autor(en) / Beteiligte

• Raushan, Rajesh Kumar
• Ansari, Mohammad Rashid
• Chauhan, Usha
• Khalid, Muhammad
• Mohapatra, Baibaswata

Titel

Implementation of 12T and 14T SRAM Bitcell Using FinFET with Optimized Parameters

Ist Teil von

• Transactions on Electrical and Electronic Materials, 2021, 22(3), , pp.328-334

Ort / Verlag

Seoul: The Korean Institute of Electrical and Electronic Material Engineers (KIEEME)

Erscheinungsjahr

2021

Quelle

Alma/SFX Local Collection

Beschreibungen/Notizen

• In this paper, we have implemented 12T and 14T SRAM bitcell using FinFET with optimized parameters. Optimized parameters are related in terms average power consumption, delay, power delay product (PDP), and energy delay product (EDP). Simulation results of all parameters of 12T and 14T SRAM bitcell are reported with 22 nm FinFET technology. All parameters of 12T and 14T SRAM using FinFET are compared to conventional 12T and 14T SRAM and found that the results have improved in average power consumption, PDP, EDP, and propagation delay. Parameters for 12T SRAM using FinFET includes average power consumption, propagation delay, PDP and EDP, which are improved by 99%, 79.2%, 99.7% and 99.7%, respectively. Similarly, designing 14T SRAM using FinFET, gets improvements of 99% in Average Power consumption, 76.5% in propagation Delay, 99.4% in PDP, and 99.5% in EDP.