Details

Autor(en) / Beteiligte

• Serbulova, K.
• Chen, S.-H.
• Hellings, G.
• Veloso, A.
• Jourdain, A.
• Linten, D.
• De Boeck, J.
• Groeseneken, G.
• Ryckaert, J.
• Van Der Plas, G.
• Beyne, E.
• Litta, E. Dentoni
• Horiguchi, N.

Titel

Enabling Active Backside Technology for ESD and LU Reliability in DTCO/STCO

Ist Teil von

• 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2022, p.431-432

Ort / Verlag

IEEE

Erscheinungsjahr

2022

Quelle

IEEE Xplore

Beschreibungen/Notizen

• The primary purpose of continuously scaling the logic technologies is to exploit an optimum performance in various applications. However, technology scaling options often result in different reliability challenges. In this paper, an active backside (BS) technology with BS contacts is proposed to bring new opportunities to the primary reliability challenges of ESD and LU. The measured and simulated results indicate the benefits for ESD robustness by enhancing the current uniformity and LU immunity by reducing the parasitic bipolar β of ~50%.