Details

Autor(en) / Beteiligte

• Lee, Jae-Gil
• Kim, Joongsik
• Suh, Dong Ik
• Kim, Ildo
• Han, Gwon Deok
• Ryu, Seung Wook
• Lee, Seho
• Na, Myung-Hee
• Cha, Seon Yong
• Park, Hyeon Woo
• Hwang, Cheol Seong

Titel

Memory Window Expansion for Ferroelectric FET based Multilevel NVM: Hybrid Solution with Combination of Polarization and Injected Charges

Ist Teil von

• 2022 IEEE International Memory Workshop (IMW), 2022, p.1-4

Ort / Verlag

IEEE

Erscheinungsjahr

2022

Quelle

IEEE

Beschreibungen/Notizen

• The memory window (MW) of a metal-ferroelectric-semiconductor (MFS)-based ferroelectric field-effect transistor (FE-FET) is generally 2V c , where V c is the coercive voltage of the FE layer. When applying the program and erase voltages, adverse charge injection from the gate metal or the channel likely occurs. While the latter decreases the MW, the former may further increase it over 2V c , which is highly useful for the multilevel FE-FET. In this work, we propose a metal-insulator-ferroelectric-semiconductor (MIFS)-based FE-FET to widen the MW by providing additional charges at the gate metal/ferroelectric interface. When part of the injected charges are retained at the polarization switching, the V c increases, and thus, MW also increases. This is due to the additional voltage drop by the injected charge exchange at the moment of FE switching. For a given FE layer thickness, the MW of MIFS-stacked FE-FET was expanded by ∼55% compared to MFS-stacked FE-FET.