Details

Autor(en) / Beteiligte

• Reis, Dayane
• Geng, Haoran
• Niemier, Michael
• Hu, Xiaobo Sharon

Titel

IMCRYPTO: An In-Memory Computing Fabric for AES Encryption and Decryption

Ist Teil von

• IEEE transactions on very large scale integration (VLSI) systems, 2022-05, Vol.30 (5), p.553-565

Ort / Verlag

New York: IEEE

Erscheinungsjahr

2022

Quelle

IEEE Electronic Library (IEL)

Beschreibungen/Notizen

• This article proposes IMCRYPTO, an in-memory computing (IMC) fabric for accelerating advanced encryption standard (AES) encryption and decryption. IMCRYPTO employs a unified structure to implement encryption and decryption in a single-hardware architecture with combined (Inv)SubBytes and (Inv)MixColumns steps. Because of this step combination and the high parallelism achieved by multiple units of random access memory (RAM) and random access/content addressable memory (RA/CAM) arrays, IMCRYPTO achieves high-throughput encryption and decryption without sacrificing area and power consumption. In addition, due to the integration of an RISC-V core, IMCRYPTO offers programmability and flexibility. IMCRYPTO improves the throughput per area by a minimum (maximum) of <inline-formula> <tex-math notation="LaTeX">3.3\times </tex-math></inline-formula> (<inline-formula> <tex-math notation="LaTeX">223.1\times </tex-math></inline-formula>) compared to previous ASICs/IMC architectures for AES-128 encryption. Projections show added benefit from emerging technologies of up to <inline-formula> <tex-math notation="LaTeX">5.3\times </tex-math></inline-formula> to the area-delay-power product of IMCRYPTO.