Details

Autor(en) / Beteiligte

• Kusuma, Rambabu
• Talari, VK Hanumantha Rao

Titel

Performance Analysis of FinFET using Gate Stack and Workfunction Engineering in 14nm Technology

Ist Teil von

• 2021 2nd International Conference for Emerging Technology (INCET), 2021, p.1-4

Ort / Verlag

IEEE

Erscheinungsjahr

2021

Quelle

IEEE Electronic Library (IEL)

Beschreibungen/Notizen

• In this paper, we designed and analyzed the performance of FinFET using various hetero dielectric structures. i.e., using SiO 2 & HfO 2 , SiO 2 & Si_{3}N_{4} and HfO 2 & Si_{3}N_{4} to get lower leakage current and higher I on /I off ratio than conventional FinFETs. Among the all configurations HfO 2 & Si_{3}N_{4} gives ameliorated performance in terms of I_{on},I_{off}, SS, and DIBL. In all structures high-k dielectric materials are used in top oxide to increase gate control and low-k dielectric materials are used near silicon for better matching of lattice constant with silicon dioxide. Drift-diffusion model and quantum models are used in three dimensional (3D) simulation using Visual TCAD.