Proceedings of the 13th International Symposium on Power Semiconductor Devices & ICs. IPSD '01 (IEEE Cat. No.01CH37216), 2001, p.169-172
2001
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Details
- Autor(en) / Beteiligte
- Titel
- 0.6 /spl mu/m BiCMOS based 15 and 25 V LDMOS for analog applications
- Ist Teil von
- Proceedings of the 13th International Symposium on Power Semiconductor Devices & ICs. IPSD '01 (IEEE Cat. No.01CH37216), 2001, p.169-172
- Ort / Verlag
- IEEE
- Erscheinungsjahr
- 2001
- Quelle
- IEEE Xplore
- Beschreibungen/Notizen
- In the present paper, we report the development of complementally 25 V LDMOS, 15 V n-ch LDMOS, 18 V npn/pnp and 5 V CMOS. The developed LDMOS achieved high on-state breakdown voltages for the gate voltage of 5.0 V. The on-resistance values of the developed 15 V and 25 V n-ch LDMOS achieves 22.7 and 27.5 mn mm/sup 2/, respectively. The characteristics of bipolar transistors and CMOS are also sufficiently good.
- Sprache
- Englisch
- Identifikatoren
- ISBN: 9784886860569, 4886860567ISSN: 1063-6854eISSN: 1946-0201DOI: 10.1109/ISPSD.2001.934582Titel-ID: cdi_ieee_primary_934582
- Format
- –
- Schlagworte
- Analog circuits, BiCMOS integrated circuits, Bipolar transistors, Breakdown voltage, Fabrication, Impurities, Indium tin oxide, MOS devices