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2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020, p.1-5
2020

Details

Autor(en) / Beteiligte
Titel
A Low Latency NN-Based Cyclic Jacobi EVD Processor for DOA Estimation in Radar System
Ist Teil von
  • 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020, p.1-5
Ort / Verlag
IEEE
Erscheinungsjahr
2020
Link zum Volltext
Quelle
IEEE Electronic Library (IEL)
Beschreibungen/Notizen
  • The development of radar technology has always been a hot issue. In recent years, due to the popularization of Advanced Driver Assistance Systems (ADAS), such as autonomous driving system and collision avoidance system, the requirements for radar technology are increasing rapidly. Through the radar system and the digital signal processing, we can get the object's information, such as range, velocity and angle. This paper will focus on the DOA (Direction of Arrival) which is called angle detection in general. The MUSIC (MUltiple SIgnal Classification) algorithm is a kind of super resolution algorithm for angle searching. In MUSIC algorithm, EVD (Eigenvalue Decomposition) has the most computation load. Therefore, we use cyclic Jacobi method to implement EVD processor, which can achieve hardware simplification. In order to reduce the latency, this paper propose using the neural network model to calculate the values of arctangent, sine and cosine function instead of using the traditional CORDIC (Coordinate Rotation Digital Computer) method. The proposed NN-based Cyclic Jacobi EVD processor was operated at 250 MHz in TSMC 90 nm CMOS technology. The total latency of the system is 1.25 us, and the total gate counts are 104.401k.
Sprache
Englisch
Identifikatoren
ISBN: 9781728133201, 1728133203
ISSN: 2158-1525
eISSN: 2158-1525
DOI: 10.1109/ISCAS45731.2020.9180881
Titel-ID: cdi_ieee_primary_9180881

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