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2019 IEEE 20th International Conference on Computational Problems of Electrical Engineering (CPEE), 2019, p.1-4
2019
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Autor(en) / Beteiligte
Titel
Simulation and Experimental Research of Software Implemented Phase-Locked Loop with Improved Noise Immunity
Ist Teil von
  • 2019 IEEE 20th International Conference on Computational Problems of Electrical Engineering (CPEE), 2019, p.1-4
Ort / Verlag
IEEE
Erscheinungsjahr
2019
Quelle
IEEE Electronic Library (IEL)
Beschreibungen/Notizen
  • Improvement of the limiting noise immunity of the communication system is an effective way to increase the capacity of the communication system, which provides quality of service for bigger number users. This task can be solved by lowering the noise threshold of the phase-locked loop (PLL) in these systems on condition that dynamic properties of the device are preserved. This article is devoted to the analysis of the firmware digital PLL behavior under the simultaneous influence of noise and modulation of the input signal. The article depicts the structure of the modified digital PLL and explains its key difference from classical PLL. The results of simulation show that PLL is not able to detect all phase changes when the noise is present in communication channel because output signal does not reach the threshold level of detection. The results of the experimental research of the PLL dynamic behavior show that the duration of the transient processes during the BPSK signal processing in the modified device is at least twice as low as for the classical one. In addition, the number of errors during signal detection increases faster for classical PLL than modified one when the noise power grows. The use of the modified PLL in modern communication systems gives an opportunity to increase their capacity.
Sprache
Englisch
Identifikatoren
DOI: 10.1109/CPEE47179.2019.8949164
Titel-ID: cdi_ieee_primary_8949164

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