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We present a sub-mW ultra-low-voltage (ULV) digitally controlled oscillator (DCO) in which all electronic devices (amplifying transistors and switched-capacitor banks) are vertically embedded within the inductor coils. A special arrangement of native layer (NT N) diminishes any adverse effects on the inductors. To suppress flicker noise upconversion while maintaining wide tuning range (TR), we propose a technique of reduced current conduction angle. Its robust start-up is ensured by a passive gain of the proposed high-k_{m}\,2:3 transformer, which is an advantage over the current approaches in class-C oscillators. Implemented in 28-nm CMOS, the proposed DCO achieves -95 dBc/Hz and -118 dBc/Hz at 100kHz and 1MHz offsets, respectively. The measured 1 /f^{3} corner is from 60kHz to 100kHz over the 35% TR (from 2.02GHz to 2.87GHz). This results in a figure-of-merit with normalized TR (FoM _{T}) at 100 kHz and 1MHz offsets of -196dB and -199dB, respectively, which is a record among \leq 0.5\mathrm{V} and \lt 1 mW oscillators.