Details

Autor(en) / Beteiligte

• Chien, W.C.
• Ho, H.Y.
• Yeh, C.W.
• Yang, C.H.
• Cheng, H.Y.
• Kim, W.
• Kuo, I.T.
• Gignac, L.M.
• Lai, E.K.
• Gong, N.
• Chou, Y.C.
• Cheng, C.W.
• Lin, Y.F.
• Papalia, J.M.
• Carta, F.
• Rav, A.
• Bruce, R.L.
• Briahtxky, M.
• Lung, H.L.

Titel

Comprehensive Scaling Study on 3D Cross-Point PCM toward 1Znm Node for SCM Applications

Ist Teil von

• 2019 Symposium on VLSI Technology, 2019, p.T60-T61

Ort / Verlag

The Japan Society of Applied Physics

Erscheinungsjahr

2019

Quelle

IEEE Xplore

Beschreibungen/Notizen

• We present a scaling study toward lZnm node 3D Cross-point PCM (XPCM) for Storage Class Memory (SCM) applications. The low operation current, and low metal line loading resistance are desired to avoid a wide operation voltage distribution in a cross-point array. For the first time, AC threshold voltage (Vth) of 1S1R OTS-PCM was studied, which will impact the operation scheme. To achieve Tera bits per chip density, six layers 1Znm 3D XPCM with OTS showing high Vth and low leakage current, and scalable periphery circuit are required.