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This work presents a multi-modulus frequency divider (MMD) chain exhibiting a very wide continuous division ratio range of 8 to 8191. Furthermore the speed and input sensitivity can be adjusted while the power consumption is reduced for slower operation. Along a more than two decades covering frequency range from 0.1 GHz to 12.8 GHz the needed differential input voltage amplitude is less than 63 mV which is equivalent to -17 dBm at a 100Ω load. The power consumption varies between 12 mW and 43.2 mW according to the speed setting. The maximum operating input frequency is 13 GHz and the divider was implemented together with other phase looked loop (PLL) components in a low cost 180 nm BiCMOS process.