Details

Autor(en) / Beteiligte

• Jiang, Zhewei
• Yin, Shihui
• Seok, Mingoo
• Seo, Jae-sun

Titel

XNOR-SRAM: In-Memory Computing SRAM Macro for Binary/Ternary Deep Neural Networks

Ist Teil von

• 2018 IEEE Symposium on VLSI Technology, 2018, p.173-174

Ort / Verlag

IEEE

Erscheinungsjahr

2018

Quelle

IEEE Xplore

Beschreibungen/Notizen

• We present an in-memory computing SRAM macro that computes XNOR-and-accumulate in binary/ternary deep neural networks on the bitline without row-by-row data access. It achieves 33X better energy and 300X better energy-delay product than digital ASIC, and also achieves significantly higher accuracy than prior in-SRAM computing macro (e.g., 98.3% vs. 90% for MNIST) by being able to support the mainstream DNN/CNN algorithms.