Details

Autor(en) / Beteiligte

• Jeong, W.C.
• Kwon, D.J.
• Nam, K.J.
• Rim, W.J.
• Jang, M.S.
• Kim, H.T.
• Lee, Y.W.
• Park, J.S.
• Lee, E.C.
• Ha, D.W.
• Park, C.H.
• Maeda, S.
• Cho, H.-J.
• Jung, S.-M.
• Kang, H.K.
• Lee, H.J.
• Lee, K.W.
• Lee, T.J.
• Park, D.W.
• Kim, B.S.
• Do, J.H.
• Fukai, T.

Titel

True 7nm Platform Technology featuring Smallest FinFET and Smallest SRAM cell by EUV, Special Constructs and 3rd Generation Single Diffusion Break

Ist Teil von

• 2018 IEEE Symposium on VLSI Technology, 2018, p.59-60

Ort / Verlag

IEEE

Erscheinungsjahr

2018

Quelle

IEEE Electronic Library (IEL)

Beschreibungen/Notizen

• 7nm platform technology that takes full advantage of EUV lithography was developed, where EUV was straightforwardly used for single patterning of MOL and BEOL, not just as a means for cutting of SADP/SAQP. The combination of 27nm fin pitch (FP) and 54nm contacted poly pitch (CPP) as well as the high density SRAM cell size of 0.0262 um 2 is the smallest in the reported FinFET platform. Further scaling is secured with special constructs and the 3 rd generation single diffusion break. Full working of 256M bit SRAM and large-scale logic test chip was demonstrated with guaranteed reliability.