Details

Autor(en) / Beteiligte

• Coudrain, P.
• Colonna, J.-P.
• Collin, L.-M.
• Prieto, R.
• Frechette, L.G.
• Barrau, J.
• Savelli, G.
• Vivet, P.
• Struss, Q.
• Widiez, J.
• Vladimirova, K.
• Triantopoulos, K.
• Beckrich-Ros, H.
• Vilarrubi, M.
• Laguna, G.
• Azarkish, H.
• Shirazi, M.
• Michailos, J.

Titel

Shaping circuit environment to face the thermal challenge Innovative technologies from low to high power electronics

Ist Teil von

• 2018 IEEE Symposium on VLSI Technology, 2018, p.15-16

Ort / Verlag

IEEE

Erscheinungsjahr

2018

Quelle

IEEE Electronic Library Online

Beschreibungen/Notizen

• This paper describes evolutions of circuit environment to face an ever-increasing thermal challenge, from early design stage down to the final package. To illustrate this critical concern we give a portrayal of innovative technologies and concepts studied for efficient thermal management from low to high power electronics, with an emphasis on hot spot management.