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A 30-dBm Class-D Power Amplifier with On/Off Logic for an Integrated Tri-Phasing Transmitter in 28-nm CMOS
Ist Teil von
2018 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2018, p.136-139
Ort / Verlag
IEEE
Erscheinungsjahr
2018
Quelle
IEEE
Beschreibungen/Notizen
This paper presents an eight-unit class-D power amplifier (PA), implemented in 28-nm CMOS. The PA is designed to utilize tri-phasing modulation, which combines coarse-amplitude polar modulation with fine-resolution outphasing components. This new technique enables achieving the back-off efficiency of multilevel outphasing without linearity-degrading discontinuities in the output waveform. Each PA unit contains a cascoded output stage with a 3.6-V supply voltage, and on/off logic enabling multilevel operation controlled by low-voltage signals. The PA achieves a peak output power of 29.7 dBm with a 34.7% efficiency, and is verified to operate with aggregated LTE signals at bandwidths up to 60 MHz at 1.7-GHz carrier frequency.