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2018 31st International Conference on VLSI Design and 2018 17th International Conference on Embedded Systems (VLSID), 2018, p.232-237
2018
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Autor(en) / Beteiligte
Titel
Flipped Voltage Follower Based Low Dropout (LDO) Voltage Regulators: A Tutorial Overview
Ist Teil von
  • 2018 31st International Conference on VLSI Design and 2018 17th International Conference on Embedded Systems (VLSID), 2018, p.232-237
Ort / Verlag
IEEE
Erscheinungsjahr
2018
Quelle
IEEE Explore
Beschreibungen/Notizen
  • This tutorial introduces flipped voltage follower (FVF) based low dropout voltage regulators (LDOs) and their recent advances in the literature. Conventional off-chip output capacitor LDOs deploy an off-chip output capacitor in the range of hundreds of nanofarads to tens of microfarads with an inherent equivalent series resistance (ESR) in order to attain stability and low overshoot and undershoot during load transients. Because of the large value of the output capacitor, the bandwidth of the LDO is often limited and the transient response is slow. Advancements in System-on-Chips (SoCs) and bill of materials cost often restrict designers from using off-chip components or too many inputoutput (IO) pins. Thus low value integrated on-chip capacitor LDOs are gaining importance. One of the major requirements of on-chip capacitor LDOs is to achieve high bandwidth. An FVF is an analog voltage buffer circuit with fast local feedback. It is capable of sourcing high currents, which makes it ideal candidate for LDOs. Design details such as pole-zero equations, stability, output resistance and transient response of basic and advanced FVF LDOs are discussed in this tutorial. The designs are analyzed with mathematical analysis and simulation results.
Sprache
Englisch
Identifikatoren
eISSN: 2380-6923
DOI: 10.1109/VLSID.2018.68
Titel-ID: cdi_ieee_primary_8326931

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