Details

Autor(en) / Beteiligte

• Fangxu Lv
• Xuqiang Zheng
• Shuai Yuan
• Ziqiang Wang
• Yajun He
• Chun Zhang
• Zhihua Wang
• Jianye Wang

Titel

A 40-80 Gb/s PAM4 wireline transmitter in 65nm CMOS technology

Ist Teil von

• 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS), 2017, p.539-542

Ort / Verlag

IEEE

Erscheinungsjahr

2017

Quelle

IEEE Electronic Library Online

Beschreibungen/Notizen

• This paper presents a 40-80 Gb/s quarter rate PAM4 wireline transmitter. The transmitter incorporates a 2-tap feed-forward equalizer (FFE) based on multiple-multiplex (MUX) and a parallel PRBS7 generator. The transmitter is achieved in 65nm CMOS technology and supplied with 1.2V. The simulation results show that the proposed transmitter can work at 40-80 Gb/s with 4-level pulse amplitude modulation (PAM4) and consumes 173mW at 80 Gb/s.