Details

Autor(en) / Beteiligte

• Chih-Wei Feng
• Jui-Chung Chang
• Wei-Chen Chen
• Wai-Chi Fang

Titel

A reliable brain computer interface implemented on FPGA for mobile dialing system

Ist Teil von

• 2015 IEEE International Conference on Consumer Electronics - Taiwan, 2015, p.110-111

Ort / Verlag

IEEE

Erscheinungsjahr

2015

Quelle

IEEE Xplore

Beschreibungen/Notizen

• This paper demonstrates a high performance brain-computer interface (BCI) that allows users to dial phone numbers. The system is based on Canonical Correlation Analysis (CCA) and Steady-State Visual Evoked Potential (SSVEP). Through six buttons (9Hz, 10Hz, 11Hz, 12Hz, 13 Hz, 14Hz) displayed on the screen, subjects can choose the number by gazing at the computer interface. This proposed EEG (Electroencephalography) system has been implemented in Field-Programmable Gate Arrays (FPGA) and it features high accuracy, integration density, and low cost. These features are meaningful for implementing a real time SSVEP-based BCI.