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2015 IEEE 21st International Symposium on High Performance Computer Architecture (HPCA), 2015, p.126-136
2015

Details

Autor(en) / Beteiligte
Titel
Heterogeneous memory architectures: A HW/SW approach for mixing die-stacked and off-package memories
Ist Teil von
  • 2015 IEEE 21st International Symposium on High Performance Computer Architecture (HPCA), 2015, p.126-136
Ort / Verlag
IEEE
Erscheinungsjahr
2015
Link zum Volltext
Quelle
IEEE Electronic Library (IEL)
Beschreibungen/Notizen
  • Die-stacked DRAM is a technology that will soon be integrated in high-performance systems. Recent studies have focused on hardware caching techniques to make use of the stacked memory, but these approaches require complex changes to the processor and also cannot leverage the stacked memory to increase the system's overall memory capacity. In this work, we explore the challenges of exposing the stacked DRAM as part of the system's physical address space. This non-uniform access memory (NUMA) styled approach greatly simplifies the hardware and increases the physical memory capacity of the system, but pushes the burden of managing the heterogeneous memory architecture (HMA) to the software layers. We first explore simple (and somewhat impractical) schemes to manage the HMA, and then refine the mechanisms to address a variety of hardware and software implementation challenges. In the end, we present an HMA approach with low hardware and software impact that can dynamically tune itself to different application scenarios, achieving performance even better than the (impractical-to-implement) baseline approaches.
Sprache
Englisch
Identifikatoren
ISSN: 1530-0897
eISSN: 2378-203X
DOI: 10.1109/HPCA.2015.7056027
Titel-ID: cdi_ieee_primary_7056027

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