Details

Autor(en) / Beteiligte

• Fanyu Liu
• Ionica, Irina
• Bawedin, Maryline
• Cristoloveanu, Sorin

Titel

Effect of back gate on parasitic bipolar effect in FD SOI MOSFETs

Ist Teil von

• 2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2014, p.1-2

Ort / Verlag

IEEE

Erscheinungsjahr

2014

Quelle

IEEE/IET Electronic Library (IEL)

Beschreibungen/Notizen

• In short-channel fully-depleted (FD) silicon-on-insulator (SOI) MOSFETs, the drain leakage current is enhanced by the parasitic bipolar transistor. The parasitic bipolar effect is induced by band-to-band tunneling and floating-body effects. It strongly depends on film thickness and back-gate voltage. We show experimentally the possibility to reduce the parasitic bipolar effect by biasing the back gate (ground plane). Based on devices simulations, we discuss the origin of the bipolar action, its suppression and the possible applications.