Details

Autor(en) / Beteiligte

• Alshahed, Muhammad
• Zili Yu
• Rempp, Horst
• Richter, Harald
• Harendt, Christine
• Burghartz, Joachim N.

Titel

Thermal characterization and modeling of ultra-thin silicon chips

Ist Teil von

• 2014 44th European Solid State Device Research Conference (ESSDERC), 2014, p.397-400

Ort / Verlag

IEEE

Erscheinungsjahr

2014

Quelle

IEEE Xplore

Beschreibungen/Notizen

• Manufacturing ultra-thin chip is an emerging field in semiconductor technology that is driven by 3-D integrated circuits and flexible electronics. Unlike bulk silicon (Si) chips with thickness greater than 400 μm, the thermal management of ultra-thin Si chips with thickness smaller than 20 μm is challenging due to the increased lateral thermal resistance implying stringent cooling requirements. Therefore, a reasonable prediction of temperature gradients in such chips is necessary. In this work, a thermal chip is implemented in an ultra-thin 0.5 μm CMOS technology to be employed in surface steady-state and transient temperature measurement. Test chips are either packaged in a Pin Grid Array (PGA) ceramic package or attached to a flexible polyimide substrate. The experimental results show an on-chip temperature gradient of ~15 °C for a dissipated power of 0.4 W in the case of the PGA package and ~30 °C for the polyimide substrate. The time constants are ~50 s and ~ 1 s for the PGA and the polyimide packages respectively. The measurements are complemented by FEM simulations using ANSYS 14.5 workbench. In addition, a lumped-element thermal circuit model is developed and used for the surface temperature prediction, which is compared to measurement results.