Details

Autor(en) / Beteiligte

• Zhongyi Huang
• Menglian Zhao
• Xiaolin Yang
• Liyu Lin
• Xiaobo Wu

Titel

A 3.86mW 106.4dB SNDR Delta-Sigma modulator based on Switched-Opamp for audio codec

Ist Teil von

• 2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS), 2014, p.761-764

Ort / Verlag

IEEE

Erscheinungsjahr

2014

Link zum Volltext

• IEEE_Xplore

Quelle

IEEE Xplore Digital Library

Beschreibungen/Notizen

• A low-power high-resolution Delta-Sigma modulator for audio codec, designed in Global-Foundries BCD 0.18μm 1P4M CMOS process, is presented. The modulator employs a fourth-order single-loop feedforward topology with a 3bit-quantizer. A novel structure of Switched-Opamp (SO) utilizing current-starvation and Slew-Rate (SR) boosting is adopted to meet the requirements of high performance and fast settling time. The opamp-shared technique and two-step summation are used to reduce power dissipation further. Meanwhile, to improve the resolution, chopper-stabilization (CHS) and pseudo data-weighted-averaging (PDWA) circuits are employed in this paper. The proposed modulator achieves 3.86mW power consumption and 106.4dB Signal-to-Noise Distortion Ratio (SNDR) with a FOM value of 0.56pJ/conv.-step at a supply voltage of 3.3V and a high working frequency of 6.25MHz, which is suitable for audio applications.