Sie befinden Sich nicht im Netzwerk der Universität Paderborn. Der Zugriff auf elektronische Ressourcen ist gegebenenfalls nur via VPN oder Shibboleth (DFN-AAI) möglich. mehr Informationen...
Demonstration of fully functional 8Mb perpendicular STT-MRAM chips with sub-5ns writing for non-volatile embedded memories
Ist Teil von
2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers, 2014, p.1-2
Ort / Verlag
IEEE
Erscheinungsjahr
2014
Quelle
IEEE Xplore
Beschreibungen/Notizen
We present major breakthroughs in MTJ design for STT-MRAM applications allowing reliable write for pulse lengths down to 1.5ns, data retention up to 125°C for 10 years and full compatibility with BEOL process up to 400°C for 1 hour. We have successfully integrated the novel structure onto an 8Mbit test chip. We demonstrate writing of every single cell in the array using sub-5ns pulses over a wide temperature range without using any error correction. We also show that sensing times of 4ns are sufficient to read every data cell. The inherent scalability of the design makes it a prime candidate for universal embedded non-volatile memories down to the 28nm node and beyond.