Details

Autor(en) / Beteiligte

• Garlepp, B.W.
• Donnelly, K.S.
• Jun Kim
• Chau, P.S.
• Zerbe, J.L.
• Huang, C.
• Tran, C.V.
• Portmann, C.L.
• Stark, D.
• Yiu-Fai Chan
• Lee, T.H.
• Horowitz, M.A.

Titel

A portable digital DLL architecture for CMOS interface circuits

Ist Teil von

• 1998 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.98CH36215), 1998, p.214-215

Ort / Verlag

IEEE

Erscheinungsjahr

1998

Quelle

IEEE Electronic Library Online

Beschreibungen/Notizen

• A digital DLL was developed which achieves infinite phase range and 40 ps worst-case phase resolution at 400 MHz. The architecture uses dual delay lines with an end-of-cycle detector, phase blenders, and duty cycle correctors. This more easily process-portable DLL achieves jitter performance comparable to a more complex analog DLL, when placed into identical high-speed interface circuits fabricated on the same die in a 0.4 /spl mu/m CMOS process.